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41 Open 87 Closed
41 Open 87 Closed
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Issues list

Status of draft 0.93 instructions
#188 opened Jun 27, 2023 by kostaspap88
Provide overflow-detecting arithmetic instructions?
#187 opened Jun 7, 2023 by lyphyser
1
cmov
#185 opened May 26, 2023 by ryao
3
Verilog source for the extension
#179 opened Nov 11, 2022 by DuyTrandeLion
1
UTF encoding/decoding instructions
#178 opened Oct 15, 2022 by CAFxX
1
Multiple OR / Multiple XOR (MMIX)
#177 opened Oct 9, 2022 by zzo38
Spec contains Zbkb instructions which do not match the scalar crypto spec
#175 opened May 20, 2022 by Wren6991
@ptomsich
4
Question: No bit-field extract/insert instructions?
#169 opened Jan 3, 2022 by mbitsnbites
2
GCC toolchain for draft v.0.93 (and v.1.0.0)
#167 opened Dec 7, 2021 by vogelpi
2
gmp (GNU Multiprecision Library) issues
#166 opened Dec 7, 2021 by jim-wilson
5
Zbt status?
#161 opened Sep 15, 2021 by damageboy
1
Zero and sign extend of pack.h vs pack.w
#160 opened Sep 4, 2021 by RogierBrussee
The mnemonic of orc.b seems to be incorrect in overview.adoc
#156 opened Aug 26, 2021 by kevin552216
Zbs: shamt[5]=1 reserved for RV32
#154 opened Jul 8, 2021 by slobodova
Meaning of misa.B in relationship to Zba, Zbb, Zbc and Zbs extensions
#153 opened Jul 5, 2021 by Silabs-ArjanB
1
Different instruction encodings in RV32 and RV64？
#152 opened Jul 4, 2021 by MasterJerryZh
4
Is GREV gone?
#151 opened Jul 2, 2021 by Serentty
9
CLMULR is inconsistent between v0.93 and v1.0
#148 opened Jun 22, 2021 by mohanson
7
Rewording of orc.b definition
#138 opened Jun 12, 2021 by BrianGraysonSiV
Should the instruction listings be purely in alphabetical order, or in logical order?
#137 opened Jun 12, 2021 by BrianGraysonSiV
Font style of instructions in the text is not consistent
#136 opened Jun 12, 2021 by BrianGraysonSiV
review of the 0.94 60 doc
#129 opened May 20, 2021 by jim-wilson
3
Bit 31 is always zero in these 64-bit test values (non-uniform random). Also - must these be nonnegative?
#125 opened Apr 15, 2021 by mjosaarinen
3
Why dedicate "reserved" opcode space for bit ops that are readily expressed in RVI instructions
#122 opened Mar 4, 2021 by David-Horner
zext.w missing from zbb table
#120 opened Feb 25, 2021 by jim-wilson
4
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