Various fixes and improvements #11
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* Fix the `_d` to `_d` assignment is a typo * If there is an ingress and an egress at the same time, the counter will count down 1 instead of staying the same * For if (egress_w_last & mgmt_ready_aw), in the case of a multi-beat write, wouldn't the AW handshake long be finished when the last W beat leaves the buffer? We saw the num_lasts counter not being decremented and overflowing when preloading from the debug module using progbuf, which caused a deadlock (monitored on the FPGA with ILAs). This was tested by using the `axirt_budget` test from Cheshire as a means of configuration and then trying to preload anything using GDB.
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@thommythomaso I used this fix for a recent evaluation, this particular fix works; we can merge |
thommythomaso
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Jul 4, 2024
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Fix
axirt_write_bufferAdd isolation poll function