This is part of the "FPGA accelerated tcpdump with eBPF" project. Refer to these two repositories for more information on the topic:
- main repository - main repostiory
- bpfcap_fpga - RTL code in SystemVerilog
-
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JDuchniewicz/fpga-tcpdump-sw
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Software part of the FPGA accelerated tcpdump via BPF
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