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[Core] Combine async postprocessor and multi-step #7921

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merged 9 commits into from
Aug 29, 2024

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@alexm-neuralmagic alexm-neuralmagic commented Aug 27, 2024

This PR combines async postprocessor with the multi-step execution. The key idea to run sampler pythonization + process_model_outputs of the previous step concurrently with the GPU forward pass (which avoid running a postprocessor at the end of the multi-step for all generated steps at once and being blocked).

Here are some first results for Llama3.1 8B on H100 with RPS==10, 8 multi-step, 1024 prompt and 512 decode. The TPOT improves by 31% from 28.10ms to 21.36ms.

8-multi-step

============ Serving Benchmark Result ============
Successful requests:                     200       
Benchmark duration (s):                  30.71     
Total input tokens:                      191053    
Total generated tokens:                  102400    
Request throughput (req/s):              6.51      
Input token throughput (tok/s):          6221.53   
Output token throughput (tok/s):         3334.60   
---------------Time to First Token----------------
Mean TTFT (ms):                          145.21    
Median TTFT (ms):                        138.28    
P99 TTFT (ms):                           304.65    
-----Time per Output Token (excl. 1st token)------
Mean TPOT (ms):                          28.10     
Median TPOT (ms):                        29.52     
P99 TPOT (ms):                           32.57     
---------------Inter-token Latency----------------
Mean ITL (ms):                           224.28    
Median ITL (ms):                         211.88    
P99 ITL (ms):                            450.95    
==================================================

8-multi-step + async

============ Serving Benchmark Result ============
Successful requests:                     200       
Benchmark duration (s):                  27.41     
Total input tokens:                      191053    
Total generated tokens:                  102400    
Request throughput (req/s):              7.30      
Input token throughput (tok/s):          6969.70   
Output token throughput (tok/s):         3735.60   
---------------Time to First Token----------------
Mean TTFT (ms):                          119.05    
Median TTFT (ms):                        109.31    
P99 TTFT (ms):                           234.82    
-----Time per Output Token (excl. 1st token)------
Mean TPOT (ms):                          21.36     
Median TPOT (ms):                        22.34     
P99 TPOT (ms):                           25.46     
---------------Inter-token Latency----------------
Mean ITL (ms):                           170.52    
Median ITL (ms):                         156.42    
P99 ITL (ms):                            463.80    
==================================================

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👋 Hi! Thank you for contributing to the vLLM project.
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@njhill @mgoin

@alexm-neuralmagic alexm-neuralmagic changed the title Combine async postprocessor and multi-step [Core] Combine async postprocessor and multi-step Aug 28, 2024
@alexm-neuralmagic alexm-neuralmagic force-pushed the async_and_multi_step_new branch from d312acb to 51f3d77 Compare August 28, 2024 13:48
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/ready

@github-actions github-actions bot added the ready ONLY add when PR is ready to merge/full CI is needed label Aug 28, 2024
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@WoosukKwon @comaniac @njhill @megha95 rebased and ready for final review

@alexm-neuralmagic alexm-neuralmagic force-pushed the async_and_multi_step_new branch 2 times, most recently from cc9a0ef to e995f2f Compare August 28, 2024 17:18
@alexm-neuralmagic alexm-neuralmagic force-pushed the async_and_multi_step_new branch from e995f2f to 3e2b7a8 Compare August 28, 2024 19:12
# Stop on the first one that fails to pythonize
cont = True
for model_output in model_input.cached_outputs:
if not model_output.pythonized:
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@SolitaryThinker SolitaryThinker Aug 28, 2024

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Can remove this if statement since maybe_pythonize checks this internally.

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this check is needed here because of the "cont", to ensure outputs are processed in order.

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But you check model_output.pythonized again when setting cont = False below, so for this case it is redundant?

is_last_output = output_id == len(model_input.cached_outputs) - 1

output = model_input.cached_outputs[output_id]
if not output.pythonized:
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ditto

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here it avoids double call to callback

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got it, thanks!

model_input=model_input,
output_proc_callback=output_proc_callback)

frozen_model_input = dataclasses.replace( # type: ignore
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model_input.frozen_model_input also needs to be updated after replacing this object right? And then the call_back only needs to be initialized and set on the first step. Current code does seem clearer though...

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You right, I need to update model_input.frozen_model_input too and this can be done once on first step only. Thanks for catching this!

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actually it hurts performance for some reason, reverted this for now.

@@ -215,6 +217,46 @@ def prepare_model_input(
)
return model_input

def _async_process_outputs(self, model_input: StatefulModelInput,
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Very cool combination of maybe_pythonize and output_proc_call_back. These two features worked out well together!

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Yeah, thanks for building the maybe_pythonize structure :)

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overall LGTM! Thanks for the great work. The perf looks great!

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The change makes sense to me. Approved to unblock the PR so that we could merge once Will's comments are addressed. Meanwhile, can you also check whether this PR also fixes #7968 or it's unrelated? Thanks!

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@SolitaryThinker addressed the comments, it works with callback replacement on first step only.

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LGTM, just some minor comments/questions. The implementation and perf looks great. thank you @alexm-neuralmagic for the amazing work!

@@ -1560,7 +1613,10 @@ def step(self) -> List[Union[RequestOutput, EmbeddingRequestOutput]]:
self.do_tracing(scheduler_outputs)
else:
# Multi-step case
ctx.request_outputs = []
if use_async_and_multi_step:
return []
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Why is this needed? Won't ctx.request_outputs = [] condition take care of both cases?

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Async postprocessor may modify ctx.request_outputs at each step, so I did not want to touch it in the middle of multi-steps running.

for scheduler in self.scheduler:
scheduler.free_finished_seq_groups()

# Create the outputs.
for i, _ in enumerate(seq_group_metadata_list):
scheduled_seq_group = scheduler_outputs.scheduled_seq_groups[i]

if i in finished_before:
if not is_multi_step and i in finished_before:
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why add not is_multi_step here? shouldn't double processing also be avoided for multi-step?

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Actually not since multi-step is using is_last_output to indicate if to run this code or not. Added docstring below to explain better.

virtual_engine: int,
is_async: bool,
sampler_output: Optional[SamplerOutput] = None,
is_last_output: bool = False) -> None:
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nit: docstring for sampler_output and is_last_output can be useful here

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Good idea, added

@WoosukKwon WoosukKwon merged commit 3f60f22 into vllm-project:main Aug 29, 2024
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Date:   Fri Sep 6 20:18:16 2024 -0700

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commit 41e95c5
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Date:   Fri Sep 6 21:49:01 2024 -0500

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    Co-authored-by: Kyle Mistele <[email protected]>

commit 12dd715
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commit 29f49cd
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Date:   Sat Sep 7 01:02:05 2024 +0200

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commit 23f3222
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Date:   Fri Sep 6 18:29:03 2024 -0400

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commit 9db52ea
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Date:   Fri Sep 6 17:26:09 2024 -0500

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commit 1447c97
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Date:   Fri Sep 6 14:51:03 2024 -0400

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commit de80783
Author: Rui Qiao <[email protected]>
Date:   Fri Sep 6 09:18:35 2024 -0700

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commit e5cab71
Author: afeldman-nm <[email protected]>
Date:   Fri Sep 6 12:01:14 2024 -0400

    [Frontend] Add --logprobs argument to `benchmark_serving.py` (vllm-project#8191)

commit baa5467
Author: Nick Hill <[email protected]>
Date:   Thu Sep 5 20:39:29 2024 -0700

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commit db3bf7c
Author: Jiaxin Shan <[email protected]>
Date:   Thu Sep 5 18:10:33 2024 -0700

    [Core] Support load and unload LoRA in api server (vllm-project#6566)

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Date:   Thu Sep 5 13:25:29 2024 -0700

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commit 2ee4528
Author: Michael Goin <[email protected]>
Date:   Thu Sep 5 11:09:46 2024 -0400

    Move verify_marlin_supported to GPTQMarlinLinearMethod (vllm-project#8165)

commit 9da25a8
Author: Alex Brooks <[email protected]>
Date:   Thu Sep 5 06:48:10 2024 -0600

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    Signed-off-by: Alex-Brooks <[email protected]>
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commit 8685ba1
Author: [email protected] <[email protected]>
Date:   Thu Sep 5 17:03:37 2024 +0530

    Inclusion of InternVLChatModel In PP_SUPPORTED_MODELS(Pipeline Parallelism) (vllm-project#7860)

commit 288a938
Author: Cyrus Leung <[email protected]>
Date:   Thu Sep 5 18:51:53 2024 +0800

    [Doc] Indicate more information about supported modalities (vllm-project#8181)

commit e39ebf5
Author: Elfie Guo <[email protected]>
Date:   Wed Sep 4 22:12:26 2024 -0700

    [Core/Bugfix] Add query dtype as per FlashInfer API requirements. (vllm-project#8173)

commit ba262c4
Author: Kevin H. Luu <[email protected]>
Date:   Wed Sep 4 20:33:12 2024 -0700

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    Signed-off-by: kevin <[email protected]>

commit 4624d98
Author: Woosuk Kwon <[email protected]>
Date:   Wed Sep 4 20:31:48 2024 -0700

    [Misc] Clean up RoPE forward_native (vllm-project#8076)

commit 1afc931
Author: William Lin <[email protected]>
Date:   Wed Sep 4 17:35:36 2024 -0700

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    Co-authored-by: Michael Goin <[email protected]>

commit e01c2be
Author: Maureen McElaney <[email protected]>
Date:   Wed Sep 4 19:50:13 2024 -0400

    [Doc] [Misc] Create CODE_OF_CONDUCT.md (vllm-project#8161)

commit 32e7db2
Author: Simon Mo <[email protected]>
Date:   Wed Sep 4 16:34:27 2024 -0700

    Bump version to v0.6.0 (vllm-project#8166)

commit 008cf88
Author: Harsha vardhan manoj Bikki <[email protected]>
Date:   Wed Sep 4 16:33:43 2024 -0700

    [Neuron] Adding support for adding/ overriding neuron configuration a… (vllm-project#8062)

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commit 77d9e51
Author: Cody Yu <[email protected]>
Date:   Wed Sep 4 13:23:22 2024 -0700

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    Co-authored-by: Michael Goin <[email protected]>

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Author: Kyle Mistele <[email protected]>
Date:   Wed Sep 4 15:18:13 2024 -0500

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commit 561d6f8
Author: Woosuk Kwon <[email protected]>
Date:   Wed Sep 4 13:05:50 2024 -0700

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commit d1dec64
Author: alexeykondrat <[email protected]>
Date:   Wed Sep 4 14:57:54 2024 -0400

    [CI/Build][ROCm] Enabling LoRA tests on ROCm (vllm-project#7369)

    Co-authored-by: Simon Mo <[email protected]>

commit 2ad2e56
Author: Cody Yu <[email protected]>
Date:   Wed Sep 4 11:53:25 2024 -0700

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commit d331156
Author: wnma <[email protected]>
Date:   Wed Sep 4 18:55:37 2024 +0800

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commit ccd7207
Author: TimWang <[email protected]>
Date:   Wed Sep 4 14:17:05 2024 +0800

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commit 855c262
Author: Cyrus Leung <[email protected]>
Date:   Wed Sep 4 13:22:17 2024 +0800

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commit 2be8ec6
Author: Peter Salas <[email protected]>
Date:   Tue Sep 3 21:38:21 2024 -0700

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commit e16fa99
Author: Dipika Sikka <[email protected]>
Date:   Tue Sep 3 22:12:41 2024 -0400

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    Co-authored-by: Michael Goin <[email protected]>

commit 61f4a93
Author: Woosuk Kwon <[email protected]>
Date:   Tue Sep 3 18:35:33 2024 -0700

    [TPU][Bugfix] Use XLA rank for persistent cache path (vllm-project#8137)

commit d4db9f5
Author: Nick Hill <[email protected]>
Date:   Tue Sep 3 17:57:41 2024 -0700

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commit 2188a60
Author: Dipika Sikka <[email protected]>
Date:   Tue Sep 3 17:21:44 2024 -0400

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Author: Simon Mo <[email protected]>
Date:   Tue Sep 3 14:11:42 2024 -0700

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commit 0af3abe
Author: Woosuk Kwon <[email protected]>
Date:   Tue Sep 3 13:29:24 2024 -0700

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commit f1575dc
Author: Kevin H. Luu <[email protected]>
Date:   Tue Sep 3 13:25:09 2024 -0700

    [ci] Fix GHA workflow  (vllm-project#8129)

    Signed-off-by: kevin <[email protected]>

commit c02638e
Author: tomeras91 <[email protected]>
Date:   Tue Sep 3 22:37:08 2024 +0300

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commit 652c83b
Author: Antoni Baum <[email protected]>
Date:   Tue Sep 3 12:28:25 2024 -0700

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commit 6d646d0
Author: Alexander Matveev <[email protected]>
Date:   Tue Sep 3 14:50:29 2024 -0400

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commit 95a178f
Author: Kevin H. Luu <[email protected]>
Date:   Tue Sep 3 11:32:27 2024 -0700

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    Signed-off-by: kevin <[email protected]>

commit bd852f2
Author: Cody Yu <[email protected]>
Date:   Tue Sep 3 10:49:18 2024 -0700

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    Co-authored-by: Tao He <[email protected]>
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Author: Isotr0py <[email protected]>
Date:   Tue Sep 3 21:37:52 2024 +0800

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commit 0fbc669
Author: Woosuk Kwon <[email protected]>
Date:   Mon Sep 2 20:35:42 2024 -0700

    [Bugfix] Fix single output condition in output processor (vllm-project#7881)

commit 6e36f4f
Author: wang.yuqi <[email protected]>
Date:   Tue Sep 3 05:20:12 2024 +0800

    improve chunked prefill performance

    [Bugfix] Fix vllm-project#7592 vllm 0.5.4 enable_chunked_prefill throughput is slightly lower than 0.5.3~0.5.0. (vllm-project#7874)

commit dd2a6a8
Author: Isotr0py <[email protected]>
Date:   Mon Sep 2 23:48:56 2024 +0800

    [Bugfix] Fix internlm2 tensor parallel inference (vllm-project#8055)

commit 4ca65a9
Author: Isotr0py <[email protected]>
Date:   Mon Sep 2 20:43:26 2024 +0800

    [Core][Bugfix] Accept GGUF model without .gguf extension (vllm-project#8056)

commit e2b2aa5
Author: Woosuk Kwon <[email protected]>
Date:   Sun Sep 1 23:09:46 2024 -0700

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commit e6a26ed
Author: Lily Liu <[email protected]>
Date:   Sun Sep 1 21:23:29 2024 -0700

    [SpecDecode][Kernel] Flashinfer Rejection Sampling (vllm-project#7244)

commit f8d6014
Author: Shawn Tan <[email protected]>
Date:   Sun Sep 1 21:37:18 2024 -0400

    [Model] Add Granite model (vllm-project#7436)

    Co-authored-by: Nick Hill <[email protected]>

commit 5b86b19
Author: Roger Wang <[email protected]>
Date:   Sun Sep 1 14:46:57 2024 -0700

    [Misc] Optional installation of audio related packages (vllm-project#8063)

commit 5231f08
Author: Roger Wang <[email protected]>
Date:   Sat Aug 31 16:35:53 2024 -0700

    [Frontend][VLM] Add support for multiple multi-modal items (vllm-project#8049)

commit 8423aef
Author: Robert Shaw <[email protected]>
Date:   Sat Aug 31 15:44:03 2024 -0400

    [BugFix][Core] Multistep Fix Crash on Request Cancellation (vllm-project#8059)

commit 4f5d844
Author: Nicolò Lucchesi <[email protected]>
Date:   Sat Aug 31 09:27:58 2024 +0200

    [Bugfix] Fix ModelScope models in v0.5.5 (vllm-project#8037)

commit d05f0a9
Author: Cyrus Leung <[email protected]>
Date:   Sat Aug 31 13:26:55 2024 +0800

    [Bugfix] Fix import error in Phi-3.5-MoE (vllm-project#8052)

commit 622f8ab
Author: Pavani Majety <[email protected]>
Date:   Fri Aug 30 22:18:50 2024 -0700

    [Bugfix] bugfix and add model test for flashinfer fp8 kv cache. (vllm-project#8013)

commit 1248e85
Author: Wenxiang <[email protected]>
Date:   Sat Aug 31 03:42:57 2024 +0800

    [Model] Adding support for MSFT Phi-3.5-MoE (vllm-project#7729)

    Co-authored-by: Your Name <[email protected]>
    Co-authored-by: Zeqi Lin <[email protected]>
    Co-authored-by: Zeqi Lin <[email protected]>

commit 2684efc
Author: Woosuk Kwon <[email protected]>
Date:   Fri Aug 30 09:01:26 2024 -0700

    [TPU][Bugfix] Fix tpu type api (vllm-project#8035)

commit 058344f
Author: Kaunil Dhruv <[email protected]>
Date:   Fri Aug 30 08:21:02 2024 -0700

    [Frontend]-config-cli-args (vllm-project#7737)

    Co-authored-by: Cyrus Leung <[email protected]>
    Co-authored-by: Kaunil Dhruv <[email protected]>

commit 98cef6a
Author: Cyrus Leung <[email protected]>
Date:   Fri Aug 30 23:20:34 2024 +0800

    [Core] Increase default `max_num_batched_tokens` for multimodal models (vllm-project#8028)

commit f97be32
Author: Jungho Christopher Cho <[email protected]>
Date:   Sat Aug 31 00:19:27 2024 +0900

    [VLM][Model] TP support for ViTs (vllm-project#7186)

    Co-authored-by: Roger Wang <[email protected]>
    Co-authored-by: Roger Wang <[email protected]>

commit afd39a4
Author: Cyrus Leung <[email protected]>
Date:   Fri Aug 30 23:03:28 2024 +0800

    [Bugfix] Fix import error in Exaone model (vllm-project#8034)

commit 2148441
Author: Richard Liu <[email protected]>
Date:   Fri Aug 30 00:27:40 2024 -0700

    [TPU] Support single and multi-host TPUs on GKE (vllm-project#7613)

commit dc13e99
Author: Yohan Na <[email protected]>
Date:   Fri Aug 30 15:34:20 2024 +0900

    [MODEL] add Exaone model support (vllm-project#7819)

commit 34a0e96
Author: Avshalom Manevich <[email protected]>
Date:   Fri Aug 30 11:11:39 2024 +0700

    [Kernel] changing fused moe kernel chunk size default to 32k (vllm-project#7995)

commit 80c7b08
Author: Woosuk Kwon <[email protected]>
Date:   Thu Aug 29 19:35:29 2024 -0700

    [TPU] Async output processing for TPU (vllm-project#8011)

commit 428dd14
Author: afeldman-nm <[email protected]>
Date:   Thu Aug 29 22:19:08 2024 -0400

    [Core] Logprobs support in Multi-step (vllm-project#7652)

commit 4abed65
Author: Cyrus Leung <[email protected]>
Date:   Fri Aug 30 08:49:04 2024 +0800

    [VLM] Disallow overflowing `max_model_len` for multimodal models (vllm-project#7998)

commit 0c785d3
Author: Wei-Sheng Chin <[email protected]>
Date:   Thu Aug 29 16:48:11 2024 -0700

    Add more percentiles and latencies (vllm-project#7759)

commit 4664cea
Author: chenqianfzh <[email protected]>
Date:   Thu Aug 29 16:09:08 2024 -0700

    support bitsandbytes 8-bit and FP4 quantized models (vllm-project#7445)

commit 257afc3
Author: Harsha vardhan manoj Bikki <[email protected]>
Date:   Thu Aug 29 13:58:14 2024 -0700

    [Neuron] Adding support for context-lenght, token-gen buckets. (vllm-project#7885)

    Co-authored-by: Harsha Bikki <[email protected]>

commit 86a677d
Author: Dipika Sikka <[email protected]>
Date:   Thu Aug 29 16:46:55 2024 -0400

    [misc] update tpu int8 to use new vLLM Parameters (vllm-project#7973)

commit d78789a
Author: Isotr0py <[email protected]>
Date:   Fri Aug 30 03:54:49 2024 +0800

    [Bugfix] Fix incorrect vocal embedding shards for GGUF model in tensor parallelism (vllm-project#7954)

commit c334b18
Author: kushanam <[email protected]>
Date:   Thu Aug 29 12:15:04 2024 -0700

    extend cuda graph size for H200 (vllm-project#7894)

    Co-authored-by: youkaichao <[email protected]>

commit 6b34215
Author: Pavani Majety <[email protected]>
Date:   Thu Aug 29 11:53:11 2024 -0700

    [Core][Kernels] Enable FP8 KV Cache with Flashinfer backend.  + BugFix for kv_cache_dtype=auto (vllm-project#7985)

    Co-authored-by: Simon Mo <[email protected]>
    Co-authored-by: Cody Yu <[email protected]>

commit 3f60f22
Author: Alexander Matveev <[email protected]>
Date:   Thu Aug 29 14:18:26 2024 -0400

    [Core] Combine async postprocessor and multi-step (vllm-project#7921)

commit f205c09
Author: Jonas M. Kübler <[email protected]>
Date:   Thu Aug 29 07:18:13 2024 +0200

    [Bugfix] Unify rank computation across regular decoding and speculative decoding (vllm-project#7899)

commit ef99a78
Author: youkaichao <[email protected]>
Date:   Wed Aug 28 21:27:06 2024 -0700

    Revert "[Core][Kernels] Use FlashInfer backend for FP8 KV Cache when available." (vllm-project#7982)

commit 74d5543
Author: Peter Salas <[email protected]>
Date:   Wed Aug 28 20:24:31 2024 -0700

    [VLM][Core] Fix exceptions on ragged NestedTensors (vllm-project#7974)

commit a7f65c2
Author: youkaichao <[email protected]>
Date:   Wed Aug 28 17:32:26 2024 -0700

    [torch.compile] remove reset (vllm-project#7975)

commit 4289cad
Author: Nick Hill <[email protected]>
Date:   Wed Aug 28 17:22:43 2024 -0700

    [Frontend] Minor optimizations to zmq decoupled front-end (vllm-project#7957)

    Co-authored-by: Robert Shaw <rshaw@neuralmagic>

commit af59df0
Author: Michael Goin <[email protected]>
Date:   Wed Aug 28 19:19:17 2024 -0400

    Remove faulty Meta-Llama-3-8B-Instruct-FP8.yaml lm-eval test (vllm-project#7961)

commit ce6bf3a
Author: youkaichao <[email protected]>
Date:   Wed Aug 28 16:10:12 2024 -0700

    [torch.compile] avoid Dynamo guard evaluation overhead (vllm-project#7898)

    Co-authored-by: Woosuk Kwon <[email protected]>

commit 3cdfe1f
Author: bnellnm <[email protected]>
Date:   Wed Aug 28 18:11:49 2024 -0400

    [Bugfix] Make torch registration of punica ops optional (vllm-project#7970)

commit fdd9daa
Author: Mor Zusman <[email protected]>
Date:   Thu Aug 29 01:06:52 2024 +0300

    [Kernel/Model] Migrate mamba_ssm and causal_conv1d kernels to vLLM (vllm-project#7651)

commit 8c56e57
Author: Stas Bekman <[email protected]>
Date:   Wed Aug 28 13:54:23 2024 -0700

    [Doc] fix 404 link (vllm-project#7966)

commit eeffde1
Author: Woosuk Kwon <[email protected]>
Date:   Wed Aug 28 13:10:21 2024 -0700

    [TPU] Upgrade PyTorch XLA nightly (vllm-project#7967)

commit e5697d1
Author: rasmith <[email protected]>
Date:   Wed Aug 28 14:37:47 2024 -0500

    [Kernel] [Triton] [AMD] Adding Triton implementations awq_dequantize and awq_gemm to support AWQ (vllm-project#7386)

commit b98cc28
Author: Pavani Majety <[email protected]>
Date:   Wed Aug 28 10:01:22 2024 -0700

    [Core][Kernels] Use FlashInfer backend for FP8 KV Cache when available. (vllm-project#7798)

    Co-authored-by: Simon Mo <[email protected]>

commit ef9baee
Author: Cyrus Leung <[email protected]>
Date:   Wed Aug 28 23:11:18 2024 +0800

    [Bugfix][VLM] Fix incompatibility between vllm-project#7902 and vllm-project#7230 (vllm-project#7948)

commit 98c12cf
Author: Stas Bekman <[email protected]>
Date:   Wed Aug 28 05:12:32 2024 -0700

    [Doc] fix the autoAWQ example (vllm-project#7937)

commit f52a43a
Author: youkaichao <[email protected]>
Date:   Wed Aug 28 01:27:07 2024 -0700

    [ci][test] fix pp test failure (vllm-project#7945)

commit e358053
Author: Cody Yu <[email protected]>
Date:   Wed Aug 28 00:36:31 2024 -0700

    [Performance] Enable chunked prefill and prefix caching together (vllm-project#7753)
Jeffwan pushed a commit to aibrix/vllm that referenced this pull request Sep 19, 2024
Alvant pushed a commit to compressa-ai/vllm that referenced this pull request Oct 26, 2024
KuntaiDu pushed a commit to KuntaiDu/vllm that referenced this pull request Nov 20, 2024
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