build: fix some warnings across the project

application-support/src/event_loop/mod.rs

@@ -125,8 +125,6 @@ specialize! {
     not: { mod not_wasm; }
 }
 
-use lc3_traits::control::Control;
-
 /*
 // To make sure that the `Backoff` interface is satisfied:
 #[doc(hidden)]

application-support/src/init/board.rs

@@ -19,10 +19,7 @@ use lc3_device_support::{
 use std::{
     borrow::Cow,
     sync::Mutex,
-    thread::Builder as ThreadBuilder,
-    path::{Path, PathBuf},
     default::Default,
-    marker::PhantomData,
 };
 
 // Static data that we need:
@@ -33,6 +30,7 @@ lazy_static::lazy_static! {
         SyncEventFutureSharedState::new();
 }
 
+#[allow(type_alias_bounds)]
 type Cont<'ss, EncFunc: FnMut() -> Cobs<Fifo<u8>>> = Controller<
     'ss,
     HostUartTransport,

application-support/src/init/sim.rs

@@ -55,7 +55,9 @@ pub(crate) fn new_sim<'io>(shims: ShimPeripheralSet<'static, 'io>) -> Sim<'io> {
 
 pub struct SimDevice<'io> {
     sim: Option<Sim<'io>>,
+    #[allow(unused)] // TODO: see below
     input: Option<SourceShim>,
+    #[allow(unused)] // TODO: see below
     output: Option<Mutex<Vec<u8>>>,
 }
 

application-support/src/init/websocket.rs

@@ -1,8 +1,5 @@
 //! TODO!
 
-use super::{BlackBox, Init};
-use crate::shim_support::Shims;
-
 #[derive(Debug)]
 pub struct WebSocketDevice {}
 

application-support/src/io_peripherals.rs

@@ -4,10 +4,8 @@
 //! [`Input`]: `lc3_traits::peripherals::Input`
 //! [`Output`]: `lc3_traits::peripherals::Output`
 
-use lc3_shims::peripherals::{Sink, SourceShim};
+use lc3_shims::peripherals::SourceShim;
 
-use std::io::{Read, Write};
-use std::ops::{Deref, DerefMut};
 use std::sync::{Arc, Mutex};
 
 /// A trait for [`Input`] Peripherals that lets us, a controller, supply the

baseline-sim/src/interp.rs

@@ -67,19 +67,21 @@ where
     }
 
     fn reset_peripherals(&mut self) {
-        use lc3_traits::peripherals::gpio::{GPIO_PINS, GpioPin, GpioState};
-        use lc3_traits::peripherals::adc::{Adc, ADC_PINS, AdcPin, AdcState};
-        use lc3_traits::peripherals::pwm::{Pwm, PWM_PINS, PwmPin, PwmState};
-        use lc3_traits::peripherals::timers::{TIMERS, TimerId, TimerMode, TimerState};
+        use lc3_traits::peripherals::gpio::{GPIO_PINS, GpioState};
+        use lc3_traits::peripherals::adc::{Adc, ADC_PINS, AdcState};
+        use lc3_traits::peripherals::pwm::{Pwm, PWM_PINS, PwmState};
+        use lc3_traits::peripherals::timers::{TIMERS, TimerMode, TimerState};
         use lc3_traits::peripherals::clock::Clock;
 
+        // TODO: do something with errors here?
+
         for pin in GPIO_PINS.iter() {
-            Gpio::set_state(self.get_peripherals_mut(), *pin, GpioState::Disabled);
+            let _ = Gpio::set_state(self.get_peripherals_mut(), *pin, GpioState::Disabled);
             Gpio::reset_interrupt_flag(self.get_peripherals_mut(), *pin);
         }
 
         for pin in ADC_PINS.iter() {
-            Adc::set_state(self.get_peripherals_mut(), *pin, AdcState::Disabled);
+            let _ = Adc::set_state(self.get_peripherals_mut(), *pin, AdcState::Disabled);
         }
 
         for pin in PWM_PINS.iter() {
@@ -1072,7 +1074,7 @@ impl<'a, M: Memory, P: Peripherals<'a>> InstructionInterpreter for Interpreter<'
         }
 
         // Increment PC (state 18):
-        let mut current_pc = self.get_pc();
+        let current_pc = self.get_pc();
         self.set_pc(current_pc.wrapping_add(1)); // TODO: ???
 
         if self.check_interrupts() {

baseline-sim/src/mem_mapped.rs

@@ -110,7 +110,7 @@ use lc3_isa::{Addr, Bits, SignedWord, Word, MCR as MCR_ADDR, PSR as PSR_ADDR, WO
 use lc3_traits::peripherals::Peripherals;
 use lc3_traits::error::Error;
 
-use crate::interp::{Acv, InstructionInterpreter, WriteAttempt};
+use crate::interp::{Acv, WriteAttempt};
 
 pub trait MemMapped: Deref<Target = Word> + Sized {
     const ADDR: Addr;
@@ -354,7 +354,7 @@ impl MemMapped for KBDR {
         Ok(Self::with_value(data))
     }
 
-    fn set<'a, I>(interp: &mut I, value: Word) -> WriteAttempt
+    fn set<'a, I>(_interp: &mut I, _value: Word) -> WriteAttempt
     where
         I: InstructionInterpreterPeripheralAccess<'a>,
         <I as Deref>::Target: Peripherals<'a>,
@@ -536,11 +536,12 @@ impl MemMapped for DDR {
         Self(value)
     }
 
-    fn from<'a, I>(interp: &I) -> Result<Self, Acv>
+    fn from<'a, I>(_interp: &I) -> Result<Self, Acv>
     where
         I: InstructionInterpreterPeripheralAccess<'a>,
         <I as Deref>::Target: Peripherals<'a>,
     {
+        // TODO: error here?
         Ok(Self::with_value(0 as Word))
     }
 
@@ -549,7 +550,8 @@ impl MemMapped for DDR {
         I: InstructionInterpreterPeripheralAccess<'a>,
         <I as Deref>::Target: Peripherals<'a>,
     {
-        Output::write_data(interp.get_peripherals_mut(), value as u8);
+        // TODO: propagate errors here!
+        let _ = Output::write_data(interp.get_peripherals_mut(), value as u8);
         Ok(())
     }
 }
@@ -667,8 +669,6 @@ macro_rules! gpio_mem_mapped {
                 I: InstructionInterpreterPeripheralAccess<'a>,
                 <I as Deref>::Target: Peripherals<'a>,
             {
-                use lc3_traits::peripherals::gpio::GpioState::*;
-
                 let word = match Gpio::read(interp.get_peripherals(), $pin) {
                     Ok(val) => val as Word,
                     Err(err) => {
@@ -685,8 +685,6 @@ macro_rules! gpio_mem_mapped {
                 I: InstructionInterpreterPeripheralAccess<'a>,
                 <I as Deref>::Target: Peripherals<'a>,
             {
-                use lc3_traits::peripherals::gpio::GpioState::*;
-
                 let bit: bool = value.bit(0);
                 match Gpio::write(interp.get_peripherals_mut(), $pin, bit) {
                     Ok(()) => Ok(()),
@@ -859,7 +857,6 @@ macro_rules! adc_mem_mapped {
                 I: InstructionInterpreterPeripheralAccess<'a>,
                 <I as Deref>::Target: Peripherals<'a>,
             {
-                use lc3_traits::peripherals::adc::AdcState::*;
 
                 let word = match Adc::read(interp.get_peripherals(), $pin) {
                     Ok(val) => val as Word,
@@ -872,7 +869,7 @@ macro_rules! adc_mem_mapped {
                 Ok(Self::with_value(word))
             }
 
-            fn set<'a, I>(interp: &mut I, value: Word) -> WriteAttempt
+            fn set<'a, I>(_interp: &mut I, _value: Word) -> WriteAttempt
             where
                 I: InstructionInterpreterPeripheralAccess<'a>,
                 <I as Deref>::Target: Peripherals<'a>,
@@ -1006,8 +1003,6 @@ macro_rules! pwm_mem_mapped {
                 I: InstructionInterpreterPeripheralAccess<'a>,
                 <I as Deref>::Target: Peripherals<'a>,
             {
-                use lc3_traits::peripherals::pwm::PwmState::*;
-
                 let word = Pwm::get_duty_cycle(interp.get_peripherals(), $pin) as Word;
 
                 Ok(Self::with_value(word))

baseline-sim/src/sim.rs

@@ -6,7 +6,7 @@ use crate::mem_mapped::{MemMapped, KBDR};
 use lc3_isa::{Addr, Reg, Word};
 use lc3_traits::control::{Control, Event, State, UnifiedRange, Idx, ProcessorMode};
 use lc3_traits::control::control::{MAX_BREAKPOINTS, MAX_MEMORY_WATCHPOINTS, MAX_CALL_STACK_DEPTH};
-use lc3_traits::control::metadata::{Identifier, ProgramMetadata, DeviceInfo, Version};
+use lc3_traits::control::metadata::{Identifier, ProgramMetadata, DeviceInfo};
 use lc3_traits::control::load::{
     PageIndex, PageWriteStart, StartPageWriteError, PageChunkError,
     FinishPageWriteError, LoadApiSession, Offset, CHUNK_SIZE_IN_WORDS,
@@ -396,7 +396,7 @@ where
 //            }
 
             for _ in 0..STEPS_IN_A_TICK {
-                if let Some(e) = self.step() {
+                if let Some(_e) = self.step() {
                     // If we produced some event, we're no longer `RunningUntilEvent`.
                     return STEPS_IN_A_TICK; // this is not accurate but this is allowed
                 }
@@ -555,7 +555,11 @@ where
         match self.get_state() {
             Halted | Paused => {}, // Nothing changes!
             RunningUntilEvent => {
-                self.shared_state.as_ref().expect("unreachable; must have a shared state to call a run_until_event and therefore be in `RunningUntilEvent`").resolve_all(Event::Interrupted);
+                self
+                    .shared_state.as_ref()
+                    .expect("unreachable; must have a shared state to call a run_until_event and therefore be in `RunningUntilEvent`")
+                    .resolve_all(Event::Interrupted)
+                    .expect("error: batch sealed!");
                 self.state = Paused;
             }
         }
@@ -568,7 +572,7 @@ where
     fn reset(&mut self) {
         self.interp.halt();
 
-        self.unset_depth_condition();
+        let _ = self.unset_depth_condition();
 
         // Resolve all futures! Doesn't cause problems if reset is called
         // multiple times.

device-support/src/rpc/encoding/postcard.rs

@@ -2,10 +2,10 @@
 
 use crate::util::Fifo;
 
-use lc3_traits::control::rpc::{Encode, Decode, RequestMessage, ResponseMessage};
+use lc3_traits::control::rpc::{Encode, Decode};
 
 use serde::{Serialize, Deserialize};
-use postcard::flavors::{SerFlavor, Cobs, Slice};
+use postcard::flavors::{SerFlavor, Cobs};
 use postcard::serialize_with_flavor;
 use postcard::take_from_bytes_cobs;
 
@@ -165,7 +165,7 @@ mod decode {
         fn decode(&mut self, encoded: &Self::Encoded) -> Result<Out, Self::Err> {
             // This is bad and is a hack!
             let mut fifo: Fifo<u8> = Fifo::new();
-            fifo.push_slice(encoded.as_ref());
+            fifo.push_slice(encoded.as_ref()).unwrap();
             // fifo.push_iter(&mut encoded.as_ref().iter()).unwrap();
 
             // // TODO: remove this hack!

device-support/src/rpc/transport/mod.rs

@@ -1,6 +1,6 @@
 //! TODO!
 
-use crate::util::fifo::{self, Fifo};
+use crate::util::fifo;
 
 use lc3_traits::control::rpc::{RequestMessage, ResponseMessage};
 

device-support/src/rpc/transport/uart_host.rs

@@ -13,10 +13,7 @@ pub use serialport::SerialPortBuilder;
 
 use std::borrow::Cow;
 use std::cell::RefCell;
-use std::convert::AsRef;
-use std::ffi::OsStr;
 use std::io::{Error, ErrorKind, Read, Result as IoResult, Write};
-use std::path::Path;
 use std::time::Duration;
 
 // TODO: Debug impl
@@ -90,7 +87,7 @@ impl Transport<Fifo<u8>, Fifo<u8>> for HostUartTransport {
         // serial.write(message.as_slice()).map(|_| ())?;
         // serial.flush()
 
-        block!(serial.write(message.as_slice()).map(|_| ()));
+        block!(serial.write(message.as_slice()).map(|_| ())).unwrap();
         block!(serial.flush())
     }
 

device-support/src/util/fifo.rs

@@ -1,11 +1,11 @@
 //! Stack allocated FIFO. (TODO)
 
 use core::{
+    convert::{AsMut, AsRef},
     fmt::{self, Debug},
-    iter::{ExactSizeIterator, Iterator, FusedIterator},
+    iter::{ExactSizeIterator, FusedIterator, Iterator},
     mem::{replace, size_of, transmute, transmute_copy, MaybeUninit},
     ops::{Index, IndexMut},
-    convert::{AsRef, AsMut},
 };
 
 // Note: Capacity is a constant so that the transition to const generics (once
@@ -305,7 +305,7 @@ impl<T> Fifo<T> {
             &[]
         } else {
             if self.ending > self.starting {
-                let s = & self.data
+                let s = &self.data
                     [(self.starting as usize)..(self.ending as usize)];
 
                 #[allow(unsafe_code)]
@@ -314,7 +314,7 @@ impl<T> Fifo<T> {
                 }
             } else if self.ending <= self.starting {
                 // Gotta do it in two parts then.
-                let s = & self.data[(self.starting as usize)..];
+                let s = &self.data[(self.starting as usize)..];
 
                 #[allow(unsafe_code)]
                 unsafe {
@@ -491,9 +491,9 @@ impl<T> Iterator for /*&mut */Fifo<T> {
     }
 }
 
-impl<T> FusedIterator for Fifo<T> { }
+impl<T> FusedIterator for Fifo<T> {}
 
-impl<T> ExactSizeIterator for Fifo<T> { }
+impl<T> ExactSizeIterator for Fifo<T> {}
 
 using_alloc! {
     use core::convert::TryInto;
@@ -558,7 +558,6 @@ sa::assert_eq_size!(&mut [MaybeUninit<u8>], &mut [u8]);
 sa::assert_eq_size!([MaybeUninit<u8>; CAPACITY], [u8; CAPACITY]);
 sa::assert_eq_align!([MaybeUninit<u8>; CAPACITY], [u8; CAPACITY]);
 
-
 #[cfg(test)]
 mod tests {
     use super::*;
@@ -575,17 +574,23 @@ mod tests {
     }
 
     impl Cloneable {
-        const fn new(n: usize) -> Self { Self { a: n, b: n, c: n } }
+        const fn new(n: usize) -> Self {
+            Self { a: n, b: n, c: n }
+        }
     }
 
     // A type this does *not* implement Clone.
     #[derive(Debug, PartialEq, Eq)]
     struct Uncloneable {
-        inner: Cloneable
+        inner: Cloneable,
     }
 
     impl Uncloneable {
-        const fn new(n: usize) -> Self { Self { inner: Cloneable::new(n) } }
+        const fn new(n: usize) -> Self {
+            Self {
+                inner: Cloneable::new(n),
+            }
+        }
     }
 
     // Also tests push_slice (requires Clone)
@@ -645,7 +650,9 @@ mod tests {
     #[test]
     fn push_uncloneable() {
         let mut arr = [0; CAPACITY];
-        for i in 0..CAPACITY { arr[i] = i; }
+        for i in 0..CAPACITY {
+            arr[i] = i;
+        }
 
         let mut iter = arr.iter().map(|i| Uncloneable::new(*i));
         let mut fifo = Fifo::new();
@@ -661,7 +668,9 @@ mod tests {
     fn overpush() {
         let mut fifo = FIFO;
 
-        for i in 0..fifo.capacity() { assert_eq!(Ok(()), fifo.push(i)); }
+        for i in 0..fifo.capacity() {
+            assert_eq!(Ok(()), fifo.push(i));
+        }
 
         assert_eq!(Err(()), fifo.push(123));
         assert_eq!(Err(()), fifo.push(567));
@@ -674,10 +683,14 @@ mod tests {
         assert_eq!(None, fifo.pop());
         assert_eq!(None, fifo.pop());
 
-        for i in 0..fifo.capacity() { assert_eq!(Ok(()), fifo.push(i)); }
+        for i in 0..fifo.capacity() {
+            assert_eq!(Ok(()), fifo.push(i));
+        }
 
         // Also tests ordering!
-        for i in 0..fifo.capacity() { assert_eq!(Some(i), fifo.pop()); }
+        for i in 0..fifo.capacity() {
+            assert_eq!(Some(i), fifo.pop());
+        }
 
         assert_eq!(None, fifo.pop());
         assert_eq!(None, fifo.pop());