Pinned Loading

1. VLIW VLIW Public

   This is a simple VLIW based processor written in Verilog. A Python script has also been included to simulate static instruction scheduling.

   Verilog 16

2. SystolicArraySimulator SystolicArraySimulator Public

   A systolic array based matrix multiply unit simulator

   Verilog

3. CMOS-circuit-implementation CMOS-circuit-implementation Public

   Code to take a gate expression and generate a sim file. This can be used to simulate and test it's behaviour with irsim

   Python 4

4. GraphGen GraphGen Public

   Python 1

5. Huffman-Encoding Huffman-Encoding Public

   An implementation of huffman encoding for data encoding using C

   C 2

6. website website Public

   My personal website

   HTML