Rollup merge of rust-lang#117468 - daxpedda:wasm-relaxed-simd, r=alex…

…crichton

Stabilize Wasm relaxed SIMD

This PR stabilizes [Wasm relaxed SIMD](https://github.com/WebAssembly/relaxed-simd) which has already reached [phase 4](https://github.com/WebAssembly/proposals/tree/04fa8c810e1dc99ab399e41052a6e427ee988180?tab=readme-ov-file#phase-4---standardize-the-feature-wg).

Tracking issue: rust-lang#111196
Implementation PR: rust-lang/stdarch#1393
Documentation: rust-lang/reference#1421
Stdarch: rust-lang/stdarch#1494

Closes rust-lang#111196.

compiler/rustc_codegen_llvm/src/llvm_util.rs

@@ -646,6 +646,22 @@ pub(crate) fn global_llvm_features(sess: &Session, diagnostics: bool) -> Vec<Str
         }
     }
 
+    // This is a workaround for a LLVM bug that doesn't implicitly enable
+    // `simd128` when `relaxed-simd` is.
+    // See <https://github.com/llvm/llvm-project/pull/99803>, which didn't make
+    // it into a released version of LLVM yet.
+    //
+    // This doesn't use the "implicit target feature" system because it is only
+    // used for function attributes in other targets, which fixes this bug as
+    // well on the function attribute level.
+    if sess.target.families.contains(&"wasm".into()) {
+        if features.iter().any(|f| f == "+relaxed-simd")
+            && !features.iter().any(|f| f == "+simd128")
+        {
+            features.push("+simd128".into());
+        }
+    }
+
     if diagnostics && let Some(f) = check_tied_features(sess, &featsmap) {
         sess.dcx().emit_err(TargetFeatureDisableOrEnable {
             features: f,

compiler/rustc_codegen_ssa/src/target_features.rs

@@ -96,6 +96,14 @@ pub fn from_target_feature(
             Some(Symbol::intern(feature))
         }));
     }
+
+    for (feature, requires) in tcx.sess.target.implicit_target_features() {
+        if target_features.iter().any(|f| f.as_str() == *feature)
+            && !target_features.iter().any(|f| f.as_str() == *requires)
+        {
+            target_features.push(Symbol::intern(requires));
+        }
+    }
 }
 
 /// Computes the set of target features used in a function for the purposes of

compiler/rustc_target/src/target_features.rs

@@ -330,12 +330,14 @@ const WASM_ALLOWED_FEATURES: &[(&str, Stability)] = &[
     ("mutable-globals", Stable),
     ("nontrapping-fptoint", Stable),
     ("reference-types", Unstable(sym::wasm_target_feature)),
-    ("relaxed-simd", Unstable(sym::wasm_target_feature)),
+    ("relaxed-simd", Stable),
     ("sign-ext", Stable),
     ("simd128", Stable),
     // tidy-alphabetical-end
 ];
 
+const WASM_IMPLICIT_FEATURES: &[(&str, &str)] = &[("relaxed-simd", "simd128")];
+
 const BPF_ALLOWED_FEATURES: &[(&str, Stability)] = &[("alu32", Unstable(sym::bpf_target_feature))];
 
 const CSKY_ALLOWED_FEATURES: &[(&str, Stability)] = &[
@@ -452,4 +454,13 @@ impl super::spec::Target {
             _ => &[],
         }
     }
+
+    /// Returns a list of target features. Each items first target feature
+    /// implicitly enables the second one.
+    pub fn implicit_target_features(&self) -> &'static [(&'static str, &'static str)] {
+        match &*self.arch {
+            "wasm32" | "wasm64" => WASM_IMPLICIT_FEATURES,
+            _ => &[],
+        }
+    }
 }

tests/ui/target-feature/implicit-features-cli.rs

@@ -0,0 +1,9 @@
+//@ only-wasm32-wasip1
+//@ compile-flags: -Ctarget-feature=+relaxed-simd --crate-type=lib
+//@ build-pass
+
+use std::arch::wasm32::*;
+
+pub fn test(a: v128, b: v128, m: v128) -> v128 {
+    i64x2_relaxed_laneselect(a, b, m)
+}

tests/ui/target-feature/implicit-features.rs

@@ -0,0 +1,10 @@
+//@ only-wasm32-wasip1
+//@ compile-flags: --crate-type=lib
+//@ build-pass
+
+use std::arch::wasm32::*;
+
+#[target_feature(enable = "relaxed-simd")]
+pub fn test(a: v128, b: v128, m: v128) -> v128 {
+    i64x2_relaxed_laneselect(a, b, m)
+}

tests/ui/target-feature/wasm-relaxed-simd.rs

@@ -0,0 +1,9 @@
+//@ only-wasm32-wasip1
+//@ compile-flags: -Ctarget-feature=+relaxed-simd --crate-type=lib
+//@ build-pass
+
+use std::arch::wasm32::*;
+
+pub fn test(a: v128, b: v128, m: v128) -> v128 {
+    i64x2_relaxed_laneselect(a, b, m)
+}