Rollup merge of #133599 - esp-rs:target/esp32s2-forced-atomics, r=Ama…

…nieu

Add `+forced-atomics` feature to esp32s2 no_std  target

Similar to #114499 but for the Xtensa backend. The ESP32-S2 doesn't have native atomic support, but can have atomic load/stores as part of the ISA with this LLVM codegen feature.

Note: The current rev of LLVM that rustc is using doesn't contain the `+forced-atomics` feature for Xtensa, but I'm pushing this now to remove the patch from our fork in `esp-rs/rust`.

r? ``@Amanieu`` because you reviewed the related RISC-V PR

compiler/rustc_target/src/spec/targets/xtensa_esp32s2_none_elf.rs

@@ -19,6 +19,7 @@ pub(crate) fn target() -> Target {
             cpu: "esp32-s2".into(),
             linker: Some("xtensa-esp32s2-elf-gcc".into()),
             max_atomic_width: Some(32),
+            features: "+forced-atomics".into(),
             ..xtensa::opts()
         },
     }