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Add a timing cut in the amo_resp path for better timing.
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Aquaticfuller committed Dec 18, 2024
1 parent 673db9d commit fb5605d
Showing 1 changed file with 29 additions and 2 deletions.
31 changes: 29 additions & 2 deletions core/cva6.sv
Original file line number Diff line number Diff line change
Expand Up @@ -1393,6 +1393,8 @@ module cva6
.inval_ready_o (inval_ready)
);
end else if (CVA6Cfg.DCacheType == config_pkg::HPDCACHE) begin : gen_cache_hpd
amo_req_t amo_req_masked;
amo_resp_t amo_resp_precut;
cva6_hpdcache_subsystem #(
.CVA6Cfg (CVA6Cfg),
.icache_areq_t(icache_areq_t),
Expand Down Expand Up @@ -1430,8 +1432,8 @@ module cva6
.dcache_flush_ack_o(dcache_flush_ack_cache_ctrl),
.dcache_miss_o (dcache_miss_cache_perf),

.dcache_amo_req_i (amo_req),
.dcache_amo_resp_o(amo_resp),
.dcache_amo_req_i (amo_req_masked),
.dcache_amo_resp_o(amo_resp_precut),

.dcache_cmo_req_i ('0 /*FIXME*/),
.dcache_cmo_resp_o( /*FIXME*/),
Expand All @@ -1457,6 +1459,31 @@ module cva6
.noc_resp_i(noc_resp_i)
);
assign inval_ready = 1'b1;

// Mask the amo_req.req when amo_resp.ack is asserted, because
// at the next cycle when the amo_resp_precut.ack is assert,
// the exe stage will get the ask from amo_resp and deassert
// the req at the next cycle
always_comb begin
amo_req_masked = amo_req;
amo_req_masked.req = amo_req.req & ~amo_resp.ack;
end

// a spill register for amo_resp, for timing optimization
spill_register #(
.T (amo_resp_t),
.Bypass(0)
) i_amo_resp (
.clk_i (clk_i),
.rst_ni (rst_ni),
.valid_i(amo_resp_precut.ack),
.ready_o(),
.data_i (amo_resp_precut),
.valid_o(),
.ready_i(1'b1),
.data_o (amo_resp)
);

end else begin : gen_cache_wb
std_cache_subsystem #(
// note: this only works with one cacheable region
Expand Down

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