bender: fix ibex Bender.yml

make: fix spelling
pulp-platform · Sep 6, 2024 · ec02c62 · ec02c62
1 parent 29b987e
commit ec02c62
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Showing 3 changed files with 7 additions and 5 deletions.
diff --git a/Makefile b/Makefile
@@ -99,7 +99,7 @@ verilator: verilator/croc.f $(SW)
 ####################
 TOP_DESIGN     ?= croc_chip
 DUT_DESIGN	   ?= croc_soc
-BENDER_TARGERS ?= asic ihp13 rtl synthesis verilator
+BENDER_TARGETS ?= asic ihp13 rtl synthesis verilator
 MORTY_DEFINES  ?= VERILATOR SYNTHESIS MORTY TARGET_ASIC TARGET_SYNTHESIS
 PICKLE_OUT	   ?= $(PROJ_DIR)/pickle
 

diff --git a/rtl/ibex/Bender.yml b/rtl/ibex/Bender.yml
@@ -13,7 +13,7 @@ sources:
 
   - target: not(all(any(test, ibex_include_tracer), not(ibex_exclude_tracer)))
     include_dirs:
-      - rtl
+      - ./
       - lowrisc_prim
 
     files:
@@ -50,7 +50,7 @@ sources:
   # formal interface so the tracer module works (`define RVFI).
   - target: all(any(test, ibex_include_tracer), not(ibex_exclude_tracer))  
     include_dirs:
-      - rtl
+      - ./
       - lowrisc_prim
     defines:
       RVFI: true

diff --git a/rtl/patches/ibex/0001-adjust-Bender-source-paths.patch b/rtl/patches/ibex/0001-adjust-Bender-source-paths.patch
@@ -24,8 +24,9 @@ index 57d62e2b..59c3a6f3 100644
 
    - target: not(all(any(test, ibex_include_tracer), not(ibex_exclude_tracer)))
      include_dirs:
-       - rtl
+-      - rtl
 -      - vendor/lowrisc_ip/ip/prim/rtl
++      - ./
 +      - lowrisc_prim
 
      files:
@@ -82,8 +83,9 @@ index 57d62e2b..59c3a6f3 100644
    # formal interface so the tracer module works (`define RVFI).
    - target: all(any(test, ibex_include_tracer), not(ibex_exclude_tracer))  
      include_dirs:
-       - rtl
+-      - rtl
 -      - vendor/lowrisc_ip/ip/prim/rtl
++      - ./
 +      - lowrisc_prim
      defines:
        RVFI: true