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[HW] Bump CVA6 to pulp-v2 #374

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[Bender] Bump CVA6 to new interface parametrization
mp-17 committed Dec 4, 2024

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commit d567abe4b17d40179d8e77e5bf14589ec7714393
2 changes: 1 addition & 1 deletion Bender.lock
Original file line number Diff line number Diff line change
@@ -30,7 +30,7 @@ packages:
Git: https://github.com/pulp-platform/common_verification.git
dependencies: []
cva6:
revision: 4415e7142810ff4b7351935ac1f73986a32b99ac
revision: f695016d8cbf8b2f37d1049bd34c99df752ad5a0
version: null
source:
Git: https://github.com/pulp-platform/cva6.git
2 changes: 1 addition & 1 deletion Bender.yml
Original file line number Diff line number Diff line change
@@ -10,7 +10,7 @@ package:
dependencies:
axi: { git: "https://github.com/pulp-platform/axi.git", version: 0.39.1 }
common_cells: { git: "https://github.com/pulp-platform/common_cells.git", version: 1.22.1 }
cva6: { git: "https://github.com/pulp-platform/cva6.git", rev: 4415e7142810ff4b7351935ac1f73986a32b99ac } # mp/pulp-v2
cva6: { git: "https://github.com/pulp-platform/cva6.git", rev: f695016d8cbf8b2f37d1049bd34c99df752ad5a0 } # mp/pulp-v2
tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.13 }
apb: { git: "https://github.com/pulp-platform/apb.git", version: 0.2.4 }


Unchanged files with check annotations Beta

Continuing with our example the following table gives the starting address in the VRF memory for all 32 vector registers. As can be seen the last nibble of every address is 0 implying that the last 3 address bits are always 0 and as such always pointing to bank 0.
.. csv-table:: Starting Address of 32 Vector Register in VRF Memory

Check warning on line 60 in docs/source/lane.rst

GitHub Actions / build

Problems with "csv-table" directive path:
:file: /documents/Vector_Starting_Addr.csv
:header-rows: 1