register hole issue

[mk1057493329]

hi taichi
what”s the feedback if the access hit a register hole？such as the example block0”s register6（0x14），register7（0x1c），if addr=0x18，the register block will giveback decerr ？

thanks

[taichi-ishitani]

Generated RTL has a parameter named ERROR_STATUS.
https://github.com/rggen/rggen-sample/blob/e0e92a0f682b1f83a59f29dcf0e98d3afbbd3b75/block_0.sv#L16

Error status will be returned when this parameter is set to 1 and a register access hits to a register hole.

---

Error status:

• APB
  • pslverr is high
• AXI4-Lite
  • bresp/rresp is SLVERR
• Wishbone
  • wb_err is high instead of wb_ack

[taichi-ishitani]

Width of register_6 is 64 bits so 0x18 is not a register hole.
0x70 is a register hole.

[taichi-ishitani]

Hi @mk1057493329 ,
Are your question resolved?

[mk1057493329]

got it， thanks very much！