x64: brgemm gru: fixed LDA for gemm iter part 2

oneapi-src · Feb 11, 2023 · fbf8dca · fbf8dca
1 parent 96e868c
commit fbf8dca
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Showing 4 changed files with 14 additions and 6 deletions.
diff --git a/src/cpu/x64/rnn/brgemm_cell_common_fwd.cpp b/src/cpu/x64/rnn/brgemm_cell_common_fwd.cpp
@@ -1,5 +1,5 @@
 /*******************************************************************************
-* Copyright 2021-2022 Intel Corporation
+* Copyright 2021-2023 Intel Corporation
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
@@ -583,7 +583,8 @@ brgemm_gru_t<src_t, weights_t, scratch_t, gemm_acc_t>::brgemm_gru_t(
     , C_cell_(scratch_cell)
     , Dl_(d_layer)
     , LDAl_(rnn_.src_layer_ld(cell_position))
-    , LDAi_(rnn_.src_iter_ld(cell_position))
+    , LDAi_p0_(rnn_.src_iter_ld(cell_position))
+    , LDAi_p1_(rnn_.dst_iter_part2_ld(cell_position))
     , max_nthr_(rnn_.nthr)
     , n_blocking_((rnn_.unfused_post_gemm) ? rnn_.N_blocks * rnn_.n_gates
                                            : rnn_.N_blocks)
@@ -687,8 +688,8 @@ void brgemm_gru_t<src_t, weights_t, scratch_t, gemm_acc_t>::kernel(
         dim_t mb = start;
         const auto m = mb * rnn_.m_block;
         const auto *const Al_m = Al_ + m * LDAl_;
-        const auto *const Ai_m = Ai_ + m * LDAi_;
-        const auto *const Ai2_m = Dl_ + m * LDAl_;
+        const auto *const Ai_m = Ai_ + m * LDAi_p0_;
+        const auto *const Ai2_m = Dl_ + m * LDAi_p1_;
 
         for (dim_t nb_i = 0; nb_i < n_blocking_; nb_i++) {
             const auto nb

diff --git a/src/cpu/x64/rnn/brgemm_cell_common_fwd.hpp b/src/cpu/x64/rnn/brgemm_cell_common_fwd.hpp
@@ -1,5 +1,5 @@
 /*******************************************************************************
-* Copyright 2021-2022 Intel Corporation
+* Copyright 2021-2023 Intel Corporation
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
@@ -177,7 +177,8 @@ class brgemm_gru_t {
     scratch_t *const C_cell_;
     src_t *const Dl_;
     const dim_t LDAl_;
-    const dim_t LDAi_;
+    const dim_t LDAi_p0_;
+    const dim_t LDAi_p1_;
     const dim_t max_nthr_;
     const dim_t n_blocking_;
     const dim_t m_blocking_;

diff --git a/tests/benchdnn/inputs/rnn/harness_gru_regression b/tests/benchdnn/inputs/rnn/harness_gru_regression
@@ -0,0 +1,4 @@
+# int8 SIC != SLC 
+--reset
+--trivial-strides=true --prop=FWD_I --alg=VANILLA_GRU --activation=UNDEF
+--direction=left2right --cfg=u8u8u8f32 l1t47mb100sic128slc256dhc128dic128
diff --git a/tests/benchdnn/inputs/rnn/test_gru_all b/tests/benchdnn/inputs/rnn/test_gru_all
@@ -7,3 +7,5 @@
 --batch=test_gru_bfloat16
 
 --batch=test_gru_bf32_bfloat16
+
+--batch=harness_gru_regression
Original file line number	Diff line number	Diff line change
Expand Up		@@ -7,3 +7,5 @@
		--batch=test_gru_bfloat16

		--batch=test_gru_bf32_bfloat16

		--batch=harness_gru_regression