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graph: backend: dnnl: layout prop: reorder src to abc for LayerNorm
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rongzha1 authored and TaoLv committed Jul 24, 2024
1 parent f704f09 commit 82f629c
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Showing 2 changed files with 11 additions and 2 deletions.
8 changes: 7 additions & 1 deletion src/graph/backend/dnnl/layout_propagator.cpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2022-2023 Intel Corporation
* Copyright 2022-2024 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -735,6 +735,12 @@ status_t layout_propagator_for_layernorm(op_ptr &op,
const auto &pd
= layernorm_executable_t::create_desc(op, p_engine, mgr, pd_cache);

insert_reorder_before(
op, 0, pd.src_desc(), p_engine, mgr, pd_cache, rewriter);
value_ptr src = op->get_input_value(0);
status = fill_layout_info(src, pd.src_desc());
if (status != status::success) return status;

insert_reorder_after(
op, 0, pd.dst_desc(), p_engine, mgr, pd_cache, rewriter);
value_ptr dst = op->get_output_value(0);
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5 changes: 4 additions & 1 deletion src/graph/backend/dnnl/op_executable.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -751,9 +751,12 @@ layernorm_executable_t::desc_t layernorm_executable_t::create_desc(

auto src = make_dnnl_memory_desc(
op->get_input_value(0)->get_logical_tensor());
// onednn spec: Implementations optimized for memory formats ab, abc, bac
// and abcd
src = to_ncx_format(src);
auto dst = make_dnnl_memory_desc(
op->get_output_value(0)->get_logical_tensor());

dst = to_format_any(dst);
dnnl::layer_normalization_forward::primitive_desc pd(
p_engine, pkind, src, dst, epsilon, flags, prm_attr);

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