feat: remove type arrays for flat slices

[TomAFrench]

Description

Problem*

Resolves

Summary*

This PR removes the element type sizes array for flat slices as we can use the var_index value directly without performing a lookup against a type array.

Additional Context

Documentation*

Check one:

• No documentation needed.
• Documentation included in this PR.
• [Exceptional Case] Documentation to be submitted in a separate PR.

PR Checklist*

• I have tested the changes locally.
• I have formatted the changes with Prettier and/or cargo fmt on default settings.

[github-actions]

Changes to circuit sizes

Generated at commit: 2a9dbc21508524f40ad251e70c32175e66e4241a, compared to commit: 70ee787662cf52bfaada85b7d2e434f8e3893575

🧾 Summary (10% most significant diffs)

Program	ACIR opcodes (+/-)	%	Circuit size (+/-)	%
array_dynamic	-47 ✅	-28.31%	-200 ✅	-5.08%
brillig_unitialised_arrays	-6 ✅	-54.55%	-15 ✅	-46.88%

---

Full diff report 👇

Program	ACIR opcodes (+/-)	%	Circuit size (+/-)	%
conditional_1	6,991 (-350)	-4.77%	38,799 (0)	0.00%
nested_array_dynamic	5,704 (-6)	-0.11%	15,099 (-24)	-0.16%
slice_dynamic_index	2,409 (-20)	-0.82%	10,610 (-91)	-0.85%
regression_mem_op_predicate	45 (-12)	-21.05%	3,537 (-44)	-1.23%
array_dynamic	119 (-47)	-28.31%	3,734 (-200)	-5.08%
brillig_unitialised_arrays	5 (-6)	-54.55%	17 (-15)	-46.88%

[TomAFrench]

@kevaundray This actually gives us pretty significant improvements on both opcodes + constraints in the kernel circuits.

Master
+------------------------------------------+------------------------+--------------+----------------------+
| Package                                  | Language               | ACIR Opcodes | Backend Circuit Size |
+------------------------------------------+------------------------+--------------+----------------------+
| private_kernel_init                      | PLONKCSat { width: 3 } | 33999        | 529116               |
+------------------------------------------+------------------------+--------------+----------------------+
| private_kernel_inner                     | PLONKCSat { width: 3 } | 92945        | 709260               |
+------------------------------------------+------------------------+--------------+----------------------+
| private_kernel_ordering                  | PLONKCSat { width: 3 } | 136632       | 406444               |
+------------------------------------------+------------------------+--------------+----------------------+
| public_kernel_private_previous           | PLONKCSat { width: 3 } | 49144        | 511140               |
+------------------------------------------+------------------------+--------------+----------------------+
| public_kernel_public_previous            | PLONKCSat { width: 3 } | 49136        | 511132               |
+------------------------------------------+------------------------+--------------+----------------------+
| rollup_merge                             | PLONKCSat { width: 3 } | 514          | 45415                |
+------------------------------------------+------------------------+--------------+----------------------+
| rollup_base                              | PLONKCSat { width: 3 } | *            | *                    |
+------------------------------------------+------------------------+--------------+----------------------+
| rollup_root                              | PLONKCSat { width: 3 } | 2275         | 103892               |
+------------------------------------------+------------------------+--------------+----------------------+

This PR
+------------------------------------------+------------------------+--------------+----------------------+
| Package                                  | Language               | ACIR Opcodes | Backend Circuit Size |
+------------------------------------------+------------------------+--------------+----------------------+
| private_kernel_init                      | PLONKCSat { width: 3 } | 30052        | 514033               |
+------------------------------------------+------------------------+--------------+----------------------+
| private_kernel_inner                     | PLONKCSat { width: 3 } | 74056        | 635242               |
+------------------------------------------+------------------------+--------------+----------------------+
| private_kernel_ordering                  | PLONKCSat { width: 3 } | 110781       | 297721               |
+------------------------------------------+------------------------+--------------+----------------------+
| public_kernel_private_previous           | PLONKCSat { width: 3 } | 43646        | 489795               |
+------------------------------------------+------------------------+--------------+----------------------+
| public_kernel_public_previous            | PLONKCSat { width: 3 } | 43638        | 489787               |
+------------------------------------------+------------------------+--------------+----------------------+
| rollup_merge                             | PLONKCSat { width: 3 } | 514          | 45415                |
+------------------------------------------+------------------------+--------------+----------------------+
| rollup_base                              | PLONKCSat { width: 3 } | *            | *                    |
+------------------------------------------+------------------------+--------------+----------------------+
| rollup_root                              | PLONKCSat { width: 3 } | 2275         | 103892               |
+------------------------------------------+------------------------+--------------+----------------------+

We're also performing a bunch of constant index reads on arrays which don't get written to after initialization either so we can save a lot of constraints there too.

[TomAFrench]

This PR is mildly janky, essentially we remove the type array when its just [0,1,2,3,4,5,6...] as we can just read the underlying array directly. We could improve this to also handle when the array elements take up multiple fields but are still constant size.