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deps: patch V8 to support compilation on win-arm64
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PR-URL: #47251
Reviewed-By: Yagiz Nizipli <[email protected]>
Reviewed-By: Jiawen Geng <[email protected]>
Reviewed-By: Rafael Gonzaga <[email protected]>
Reviewed-By: Richard Lau <[email protected]>
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targos authored and nodejs-github-bot committed Mar 31, 2023
1 parent a7c129f commit 7eb0ac3
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Showing 4 changed files with 21 additions and 14 deletions.
2 changes: 1 addition & 1 deletion common.gypi
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Expand Up @@ -36,7 +36,7 @@

# Reset this number to 0 on major V8 upgrades.
# Increment by one for each non-official patch applied to deps/v8.
'v8_embedder_string': '-node.2',
'v8_embedder_string': '-node.3',

##### V8 defaults for Node.js #####

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5 changes: 5 additions & 0 deletions deps/v8/src/execution/arm64/simulator-arm64.cc
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Expand Up @@ -34,6 +34,11 @@
#include "src/trap-handler/trap-handler-simulator.h"
#endif // V8_ENABLE_WEBASSEMBLY

#if defined(_MSC_VER)
// define full memory barrier for msvc
#define __sync_synchronize _ReadWriteBarrier
#endif

namespace v8 {
namespace internal {

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4 changes: 3 additions & 1 deletion deps/v8/src/trap-handler/trap-handler-simulator.h
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Expand Up @@ -34,8 +34,10 @@ uintptr_t ProbeMemory(uintptr_t address, uintptr_t pc)
// "ProbeMemory", but we want something more expressive on stack traces.
#if V8_OS_DARWIN
asm("_v8_internal_simulator_ProbeMemory");
#else
#elif !defined(_MSC_VER)
asm("v8_internal_simulator_ProbeMemory");
#else // MSVC
;
#endif

} // namespace v8::internal::trap_handler
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24 changes: 12 additions & 12 deletions deps/v8/test/cctest/test-assembler-arm64.cc
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Expand Up @@ -14771,12 +14771,12 @@ static void AtomicMemoryWHelper(AtomicMemoryLoadSignature* load_funcs,
AtomicMemoryStoreSignature* store_funcs,
uint64_t arg1, uint64_t arg2, uint64_t expected,
uint64_t result_mask) {
uint64_t data0[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data1[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data2[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data3[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data4[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data5[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data0[2] = {arg2, 0};
uint64_t data1[2] = {arg2, 0};
uint64_t data2[2] = {arg2, 0};
uint64_t data3[2] = {arg2, 0};
uint64_t data4[2] = {arg2, 0};
uint64_t data5[2] = {arg2, 0};

SETUP();
SETUP_FEATURE(LSE);
Expand Down Expand Up @@ -14838,12 +14838,12 @@ static void AtomicMemoryXHelper(AtomicMemoryLoadSignature* load_funcs,
AtomicMemoryStoreSignature* store_funcs,
uint64_t arg1, uint64_t arg2,
uint64_t expected) {
uint64_t data0[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data1[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data2[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data3[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data4[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data5[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0};
uint64_t data0[2] = {arg2, 0};
uint64_t data1[2] = {arg2, 0};
uint64_t data2[2] = {arg2, 0};
uint64_t data3[2] = {arg2, 0};
uint64_t data4[2] = {arg2, 0};
uint64_t data5[2] = {arg2, 0};

SETUP();
SETUP_FEATURE(LSE);
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