deps: upgrade openssl sources to 1.0.2e

This just replaces all sources of openssl-1.0.2e.tar.gz into deps/openssl/openssl deps: copy all openssl header files to include dir All symlink files in `deps/openssl/openssl/include/openssl/` are removed and replaced with real header files to avoid issues on Windows. Two files of opensslconf.h in crypto and include dir are replaced to refer config/opensslconf.h. deps: fix openssl assembly error on ia32 win32 `x86masm.pl` was mistakenly using .486 instruction set, why `cpuid` (and perhaps others) are requiring .686 . deps: fix asm build error of openssl in x86_win32 See https://mta.openssl.org/pipermail/openssl-dev/2015-February/000651.html node needs to stop using masm and move to nasm or yasm on Win32. openssl: fix keypress requirement in apps on win32 Reapply b910613 . deps: add -no_rand_screen to openssl s_client In openssl s_client on Windows, RAND_screen() is invoked to initialize random state but it takes several seconds in each connection. This added -no_rand_screen to openssl s_client on Windows to skip RAND_screen() and gets a better performance in the unit test of test-tls-server-verify. Do not enable this except to use in the unit test. deps: update openssl config files Regenrate config files for supported platforms with Makefile. deps: update openssl asm and asm_obsolete files Regenerate asm files with Makefile and CC=gcc and ASM=gcc where gcc-4.8.4. Also asm files in asm_obsolete dir to support old compiler and assmebler are regenerated without CC and ASM envs. PR-URL: #4134 Reviewed-By: Fedor Indutny <[email protected]>
nodejs · Dec 3, 2015 · 6ab479a · 6ab479a
1 parent d7637c9
commit 6ab479a
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diff --git a/deps/openssl/asm/arm-void-gas/bn/armv4-gf2m.S b/deps/openssl/asm/arm-void-gas/bn/armv4-gf2m.S
@@ -98,7 +98,7 @@ bn_GF2m_mul_2x2:
 	mov	r12,#7<<2
 	sub	sp,sp,#32		@ allocate tab[8]
 
-	bl	mul_1x1_ialu		@ a1·b1
+	bl	mul_1x1_ialu		@ a1·b1
 	str	r5,[r10,#8]
 	str	r4,[r10,#12]
 
@@ -108,13 +108,13 @@ bn_GF2m_mul_2x2:
 	 eor	r2,r2,r1
 	eor	r0,r0,r3
 	 eor	r1,r1,r2
-	bl	mul_1x1_ialu		@ a0·b0
+	bl	mul_1x1_ialu		@ a0·b0
 	str	r5,[r10]
 	str	r4,[r10,#4]
 
 	eor	r1,r1,r2
 	eor	r0,r0,r3
-	bl	mul_1x1_ialu		@ (a1+a0)·(b1+b0)
+	bl	mul_1x1_ialu		@ (a1+a0)·(b1+b0)
 	ldmia	r10,{r6-r9}
 	eor	r5,r5,r4
 	eor	r4,r4,r7

diff --git a/deps/openssl/asm/arm-void-gas/modes/ghash-armv4.S b/deps/openssl/asm/arm-void-gas/modes/ghash-armv4.S
@@ -3,6 +3,11 @@
 .text
 .code	32
 
+#ifdef __clang__
+#define ldrplb	ldrbpl
+#define ldrneb	ldrbne
+#endif
+
 .type	rem_4bit,%object
 .align	5
 rem_4bit:

diff --git a/deps/openssl/asm/arm-void-gas/modes/ghashv8-armx.S b/deps/openssl/asm/arm-void-gas/modes/ghashv8-armx.S
@@ -66,10 +66,10 @@ gcm_gmult_v8:
 #endif
 	vext.8		q3,q9,q9,#8
 
-	.byte	0x86,0x0e,0xa8,0xf2	@ pmull q0,q12,q3		@ H.lo·Xi.lo
+	.byte	0x86,0x0e,0xa8,0xf2	@ pmull q0,q12,q3		@ H.lo·Xi.lo
 	veor		q9,q9,q3		@ Karatsuba pre-processing
-	.byte	0x87,0x4e,0xa9,0xf2	@ pmull2 q2,q12,q3		@ H.hi·Xi.hi
-	.byte	0xa2,0x2e,0xaa,0xf2	@ pmull q1,q13,q9		@ (H.lo+H.hi)·(Xi.lo+Xi.hi)
+	.byte	0x87,0x4e,0xa9,0xf2	@ pmull2 q2,q12,q3		@ H.hi·Xi.hi
+	.byte	0xa2,0x2e,0xaa,0xf2	@ pmull q1,q13,q9		@ (H.lo+H.hi)·(Xi.lo+Xi.hi)
 
 	vext.8		q9,q0,q2,#8		@ Karatsuba post-processing
 	veor		q10,q0,q2
@@ -134,7 +134,7 @@ gcm_ghash_v8:
 #endif
 	vext.8		q7,q9,q9,#8
 	veor		q3,q3,q0		@ I[i]^=Xi
-	.byte	0x8e,0x8e,0xa8,0xf2	@ pmull q4,q12,q7		@ H·Ii+1
+	.byte	0x8e,0x8e,0xa8,0xf2	@ pmull q4,q12,q7		@ H·Ii+1
 	veor		q9,q9,q7		@ Karatsuba pre-processing
 	.byte	0x8f,0xce,0xa9,0xf2	@ pmull2 q6,q12,q7
 	b		.Loop_mod2x_v8
@@ -143,14 +143,14 @@ gcm_ghash_v8:
 .Loop_mod2x_v8:
 	vext.8		q10,q3,q3,#8
 	subs		r3,r3,#32		@ is there more data?
-	.byte	0x86,0x0e,0xac,0xf2	@ pmull q0,q14,q3		@ H^2.lo·Xi.lo
+	.byte	0x86,0x0e,0xac,0xf2	@ pmull q0,q14,q3		@ H^2.lo·Xi.lo
 	movlo	r12,#0			@ is it time to zero r12?
 
 	 .byte	0xa2,0xae,0xaa,0xf2	@ pmull q5,q13,q9
 	veor		q10,q10,q3		@ Karatsuba pre-processing
-	.byte	0x87,0x4e,0xad,0xf2	@ pmull2 q2,q14,q3		@ H^2.hi·Xi.hi
+	.byte	0x87,0x4e,0xad,0xf2	@ pmull2 q2,q14,q3		@ H^2.hi·Xi.hi
 	veor		q0,q0,q4		@ accumulate
-	.byte	0xa5,0x2e,0xab,0xf2	@ pmull2 q1,q13,q10		@ (H^2.lo+H^2.hi)·(Xi.lo+Xi.hi)
+	.byte	0xa5,0x2e,0xab,0xf2	@ pmull2 q1,q13,q10		@ (H^2.lo+H^2.hi)·(Xi.lo+Xi.hi)
 	 vld1.64	{q8},[r2],r12	@ load [rotated] I[i+2]
 
 	veor		q2,q2,q6
@@ -175,7 +175,7 @@ gcm_ghash_v8:
 	 vext.8		q7,q9,q9,#8
 	 vext.8		q3,q8,q8,#8
 	veor		q0,q1,q10
-	 .byte	0x8e,0x8e,0xa8,0xf2	@ pmull q4,q12,q7		@ H·Ii+1
+	 .byte	0x8e,0x8e,0xa8,0xf2	@ pmull q4,q12,q7		@ H·Ii+1
 	veor		q3,q3,q2		@ accumulate q3 early
 
 	vext.8		q10,q0,q0,#8		@ 2nd phase of reduction
@@ -196,10 +196,10 @@ gcm_ghash_v8:
 	veor		q3,q3,q0		@ inp^=Xi
 	veor		q9,q8,q10		@ q9 is rotated inp^Xi
 
-	.byte	0x86,0x0e,0xa8,0xf2	@ pmull q0,q12,q3		@ H.lo·Xi.lo
+	.byte	0x86,0x0e,0xa8,0xf2	@ pmull q0,q12,q3		@ H.lo·Xi.lo
 	veor		q9,q9,q3		@ Karatsuba pre-processing
-	.byte	0x87,0x4e,0xa9,0xf2	@ pmull2 q2,q12,q3		@ H.hi·Xi.hi
-	.byte	0xa2,0x2e,0xaa,0xf2	@ pmull q1,q13,q9		@ (H.lo+H.hi)·(Xi.lo+Xi.hi)
+	.byte	0x87,0x4e,0xa9,0xf2	@ pmull2 q2,q12,q3		@ H.hi·Xi.hi
+	.byte	0xa2,0x2e,0xaa,0xf2	@ pmull q1,q13,q9		@ (H.lo+H.hi)·(Xi.lo+Xi.hi)
 
 	vext.8		q9,q0,q2,#8		@ Karatsuba post-processing
 	veor		q10,q0,q2

diff --git a/deps/openssl/asm/arm64-linux64-gas/modes/ghashv8-armx.S b/deps/openssl/asm/arm64-linux64-gas/modes/ghashv8-armx.S
@@ -65,10 +65,10 @@ gcm_gmult_v8:
 #endif
 	ext		v3.16b,v17.16b,v17.16b,#8
 
-	pmull	v0.1q,v20.1d,v3.1d		//H.loˇXi.lo
+	pmull	v0.1q,v20.1d,v3.1d		//H.lo·Xi.lo
 	eor		v17.16b,v17.16b,v3.16b		//Karatsuba pre-processing
-	pmull2	v2.1q,v20.2d,v3.2d		//H.hiˇXi.hi
-	pmull	v1.1q,v21.1d,v17.1d		//(H.lo+H.hi)ˇ(Xi.lo+Xi.hi)
+	pmull2	v2.1q,v20.2d,v3.2d		//H.hi·Xi.hi
+	pmull	v1.1q,v21.1d,v17.1d		//(H.lo+H.hi)·(Xi.lo+Xi.hi)
 
 	ext		v17.16b,v0.16b,v2.16b,#8		//Karatsuba post-processing
 	eor		v18.16b,v0.16b,v2.16b
@@ -132,7 +132,7 @@ gcm_ghash_v8:
 #endif
 	ext		v7.16b,v17.16b,v17.16b,#8
 	eor		v3.16b,v3.16b,v0.16b		//I[i]^=Xi
-	pmull	v4.1q,v20.1d,v7.1d		//HˇIi+1
+	pmull	v4.1q,v20.1d,v7.1d		//H·Ii+1
 	eor		v17.16b,v17.16b,v7.16b		//Karatsuba pre-processing
 	pmull2	v6.1q,v20.2d,v7.2d
 	b		.Loop_mod2x_v8
@@ -141,14 +141,14 @@ gcm_ghash_v8:
 .Loop_mod2x_v8:
 	ext		v18.16b,v3.16b,v3.16b,#8
 	subs		x3,x3,#32		//is there more data?
-	pmull	v0.1q,v22.1d,v3.1d		//H^2.loˇXi.lo
+	pmull	v0.1q,v22.1d,v3.1d		//H^2.lo·Xi.lo
 	csel	x12,xzr,x12,lo			//is it time to zero x12?
 
 	 pmull	v5.1q,v21.1d,v17.1d
 	eor		v18.16b,v18.16b,v3.16b		//Karatsuba pre-processing
-	pmull2	v2.1q,v22.2d,v3.2d		//H^2.hiˇXi.hi
+	pmull2	v2.1q,v22.2d,v3.2d		//H^2.hi·Xi.hi
 	eor		v0.16b,v0.16b,v4.16b		//accumulate
-	pmull2	v1.1q,v21.2d,v18.2d		//(H^2.lo+H^2.hi)ˇ(Xi.lo+Xi.hi)
+	pmull2	v1.1q,v21.2d,v18.2d		//(H^2.lo+H^2.hi)·(Xi.lo+Xi.hi)
 	 ld1	{v16.2d},[x2],x12	//load [rotated] I[i+2]
 
 	eor		v2.16b,v2.16b,v6.16b
@@ -173,7 +173,7 @@ gcm_ghash_v8:
 	 ext		v7.16b,v17.16b,v17.16b,#8
 	 ext		v3.16b,v16.16b,v16.16b,#8
 	eor		v0.16b,v1.16b,v18.16b
-	 pmull	v4.1q,v20.1d,v7.1d		//HˇIi+1
+	 pmull	v4.1q,v20.1d,v7.1d		//H·Ii+1
 	eor		v3.16b,v3.16b,v2.16b		//accumulate v3.16b early
 
 	ext		v18.16b,v0.16b,v0.16b,#8		//2nd phase of reduction
@@ -194,10 +194,10 @@ gcm_ghash_v8:
 	eor		v3.16b,v3.16b,v0.16b		//inp^=Xi
 	eor		v17.16b,v16.16b,v18.16b		//v17.16b is rotated inp^Xi
 
-	pmull	v0.1q,v20.1d,v3.1d		//H.loˇXi.lo
+	pmull	v0.1q,v20.1d,v3.1d		//H.lo·Xi.lo
 	eor		v17.16b,v17.16b,v3.16b		//Karatsuba pre-processing
-	pmull2	v2.1q,v20.2d,v3.2d		//H.hiˇXi.hi
-	pmull	v1.1q,v21.1d,v17.1d		//(H.lo+H.hi)ˇ(Xi.lo+Xi.hi)
+	pmull2	v2.1q,v20.2d,v3.2d		//H.hi·Xi.hi
+	pmull	v1.1q,v21.1d,v17.1d		//(H.lo+H.hi)·(Xi.lo+Xi.hi)
 
 	ext		v17.16b,v0.16b,v2.16b,#8		//Karatsuba post-processing
 	eor		v18.16b,v0.16b,v2.16b

diff --git a/deps/openssl/asm/x64-elf-gas/aes/aesni-sha256-x86_64.s b/deps/openssl/asm/x64-elf-gas/aes/aesni-sha256-x86_64.s
@@ -21,11 +21,8 @@ aesni_cbc_sha256_enc:
 	andl	$296,%r11d
 	cmpl	$296,%r11d
 	je	aesni_cbc_sha256_enc_avx2
-	andl	$1073741824,%eax
-	andl	$268435968,%r10d
-	orl	%eax,%r10d
-	cmpl	$1342177792,%r10d
-	je	aesni_cbc_sha256_enc_avx
+	andl	$268435456,%r10d
+	jnz	aesni_cbc_sha256_enc_avx
 	ud2
 	xorl	%eax,%eax
 	cmpq	$0,%rdi

diff --git a/deps/openssl/asm/x64-elf-gas/bn/x86_64-mont5.s b/deps/openssl/asm/x64-elf-gas/bn/x86_64-mont5.s
@@ -1565,6 +1565,15 @@ sqr8x_reduction:
 .align	32
 .L8x_tail_done:
 	addq	(%rdx),%r8
+	adcq	$0,%r9
+	adcq	$0,%r10
+	adcq	$0,%r11
+	adcq	$0,%r12
+	adcq	$0,%r13
+	adcq	$0,%r14
+	adcq	$0,%r15
+
+
 	xorq	%rax,%rax
 
 	negq	%rsi
@@ -2806,6 +2815,15 @@ sqrx8x_reduction:
 .align	32
 .Lsqrx8x_tail_done:
 	addq	24+8(%rsp),%r8
+	adcq	$0,%r9
+	adcq	$0,%r10
+	adcq	$0,%r11
+	adcq	$0,%r12
+	adcq	$0,%r13
+	adcq	$0,%r14
+	adcq	$0,%r15
+
+
 	movq	%rsi,%rax
 
 	subq	16+8(%rsp),%rsi
@@ -2839,13 +2857,11 @@ sqrx8x_reduction:
 	leaq	64(%rdi,%rcx,1),%rdi
 	cmpq	8+8(%rsp),%r8
 	jb	.Lsqrx8x_reduction_loop
-	xorq	%rbx,%rbx
+	xorl	%ebx,%ebx
 	subq	%r15,%rsi
 	adcq	%rbx,%rbx
 	movq	%rcx,%r10
-.byte	0x67
 	orq	%rbx,%rax
-.byte	0x67
 	movq	%rcx,%r9
 	xorq	$1,%rax
 	sarq	$3+2,%rcx

diff --git a/deps/openssl/asm/x64-macosx-gas/aes/aesni-sha256-x86_64.s b/deps/openssl/asm/x64-macosx-gas/aes/aesni-sha256-x86_64.s
@@ -21,11 +21,8 @@ _aesni_cbc_sha256_enc:
 	andl	$296,%r11d
 	cmpl	$296,%r11d
 	je	aesni_cbc_sha256_enc_avx2
-	andl	$1073741824,%eax
-	andl	$268435968,%r10d
-	orl	%eax,%r10d
-	cmpl	$1342177792,%r10d
-	je	aesni_cbc_sha256_enc_avx
+	andl	$268435456,%r10d
+	jnz	aesni_cbc_sha256_enc_avx
 	ud2
 	xorl	%eax,%eax
 	cmpq	$0,%rdi

diff --git a/deps/openssl/asm/x64-macosx-gas/bn/x86_64-mont5.s b/deps/openssl/asm/x64-macosx-gas/bn/x86_64-mont5.s
@@ -1565,6 +1565,15 @@ L$8x_tail:
 .p2align	5
 L$8x_tail_done:
 	addq	(%rdx),%r8
+	adcq	$0,%r9
+	adcq	$0,%r10
+	adcq	$0,%r11
+	adcq	$0,%r12
+	adcq	$0,%r13
+	adcq	$0,%r14
+	adcq	$0,%r15
+
+
 	xorq	%rax,%rax
 
 	negq	%rsi
@@ -2806,6 +2815,15 @@ L$sqrx8x_tail:
 .p2align	5
 L$sqrx8x_tail_done:
 	addq	24+8(%rsp),%r8
+	adcq	$0,%r9
+	adcq	$0,%r10
+	adcq	$0,%r11
+	adcq	$0,%r12
+	adcq	$0,%r13
+	adcq	$0,%r14
+	adcq	$0,%r15
+
+
 	movq	%rsi,%rax
 
 	subq	16+8(%rsp),%rsi
@@ -2839,13 +2857,11 @@ L$sqrx8x_no_tail:
 	leaq	64(%rdi,%rcx,1),%rdi
 	cmpq	8+8(%rsp),%r8
 	jb	L$sqrx8x_reduction_loop
-	xorq	%rbx,%rbx
+	xorl	%ebx,%ebx
 	subq	%r15,%rsi
 	adcq	%rbx,%rbx
 	movq	%rcx,%r10
-.byte	0x67
 	orq	%rbx,%rax
-.byte	0x67
 	movq	%rcx,%r9
 	xorq	$1,%rax
 	sarq	$3+2,%rcx

diff --git a/deps/openssl/asm/x64-win32-masm/aes/aesni-sha256-x86_64.asm b/deps/openssl/asm/x64-win32-masm/aes/aesni-sha256-x86_64.asm
@@ -22,11 +22,8 @@ aesni_cbc_sha256_enc	PROC PUBLIC
 	and	r11d,296
 	cmp	r11d,296
 	je	aesni_cbc_sha256_enc_avx2
-	and	eax,1073741824
-	and	r10d,268435968
-	or	r10d,eax
-	cmp	r10d,1342177792
-	je	aesni_cbc_sha256_enc_avx
+	and	r10d,268435456
+	jnz	aesni_cbc_sha256_enc_avx
 	ud2
 	xor	eax,eax
 	cmp	rcx,0

diff --git a/deps/openssl/asm/x64-win32-masm/bn/x86_64-mont5.asm b/deps/openssl/asm/x64-win32-masm/bn/x86_64-mont5.asm
@@ -1624,6 +1624,15 @@ $L$8x_tail::
 ALIGN	32
 $L$8x_tail_done::
 	add	r8,QWORD PTR[rdx]
+	adc	r9,0
+	adc	r10,0
+	adc	r11,0
+	adc	r12,0
+	adc	r13,0
+	adc	r14,0
+	adc	r15,0
+
+
 	xor	rax,rax
 
 	neg	rsi
@@ -2923,6 +2932,15 @@ DB	0c4h,062h,0fbh,0f6h,0a5h,040h,000h,000h,000h
 ALIGN	32
 $L$sqrx8x_tail_done::
 	add	r8,QWORD PTR[((24+8))+rsp]
+	adc	r9,0
+	adc	r10,0
+	adc	r11,0
+	adc	r12,0
+	adc	r13,0
+	adc	r14,0
+	adc	r15,0
+
+
 	mov	rax,rsi
 
 	sub	rsi,QWORD PTR[((16+8))+rsp]
@@ -2956,13 +2974,11 @@ DB	102,72,15,126,213
 	lea	rdi,QWORD PTR[64+rcx*1+rdi]
 	cmp	r8,QWORD PTR[((8+8))+rsp]
 	jb	$L$sqrx8x_reduction_loop
-	xor	rbx,rbx
+	xor	ebx,ebx
 	sub	rsi,r15
 	adc	rbx,rbx
 	mov	r10,rcx
-DB	067h
 	or	rax,rbx
-DB	067h
 	mov	r9,rcx
 	xor	rax,1
 	sar	rcx,3+2

diff --git a/deps/openssl/asm_obsolete/arm-void-gas/bn/armv4-gf2m.S b/deps/openssl/asm_obsolete/arm-void-gas/bn/armv4-gf2m.S
@@ -98,7 +98,7 @@ bn_GF2m_mul_2x2:
 	mov	r12,#7<<2
 	sub	sp,sp,#32		@ allocate tab[8]
 
-	bl	mul_1x1_ialu		@ a1·b1
+	bl	mul_1x1_ialu		@ a1·b1
 	str	r5,[r10,#8]
 	str	r4,[r10,#12]
 
@@ -108,13 +108,13 @@ bn_GF2m_mul_2x2:
 	 eor	r2,r2,r1
 	eor	r0,r0,r3
 	 eor	r1,r1,r2
-	bl	mul_1x1_ialu		@ a0·b0
+	bl	mul_1x1_ialu		@ a0·b0
 	str	r5,[r10]
 	str	r4,[r10,#4]
 
 	eor	r1,r1,r2
 	eor	r0,r0,r3
-	bl	mul_1x1_ialu		@ (a1+a0)·(b1+b0)
+	bl	mul_1x1_ialu		@ (a1+a0)·(b1+b0)
 	ldmia	r10,{r6-r9}
 	eor	r5,r5,r4
 	eor	r4,r4,r7

diff --git a/deps/openssl/asm_obsolete/arm-void-gas/modes/ghash-armv4.S b/deps/openssl/asm_obsolete/arm-void-gas/modes/ghash-armv4.S
@@ -3,6 +3,11 @@
 .text
 .code	32
 
+#ifdef __clang__
+#define ldrplb	ldrbpl
+#define ldrneb	ldrbne
+#endif
+
 .type	rem_4bit,%object
 .align	5
 rem_4bit: