iverilog: add v12.0.rc

[umarcor]

This PR adds package iverilog: steveicarus/iverilog (iverilog.icarus.com). It's "a Verilog simulation and synthesis tool".

[umarcor]

FTR: https://github.com/steveicarus/iverilog/blob/master/README.txt points to https://github.com/steveicarus/iverilog/blob/master/mingw.txt, which points to https://iverilog.fandom.com/wiki/Installation_Guide#Compiling_on_MS_Windows_.28MinGW.29, which points to https://iverilog.fandom.com/wiki/Installation_using_MSYS2.

Note: If you use a MinGW shell, be aware that by default MSYS2 uses the mintty terminal emulator, which has the annoying artefact that it fully buffers all output to stdout. You can use the vvp -i option to overcome this when running simulations.

The iverilog.pdf, iverilog-vpi.pdf, and vvp.pdf files document the main commands.

[umarcor]

I addressed the review comments. However, despite make check passing on both MINGW32 and MINGW64, I found that further tests segfault on MINGW64. Therefore, I opened steveicarus/iverilog#398 and I'll convert this PR to a draft until that's solved.

[umarcor]

Maintainers of iverilog addressed the issues (including the bug that failed with ASLR). This package was thoroughly tested, by running the full test suite and arbitrary projects: https://github.com/umarcor/MINGW-packages/actions/runs/402112721. Therefore, it is ready for review.

[lazka]

added two commits:

• 36198e7 (otherwise our buildbot will fail)
• 4150eb6 (was there a reason to not use normal make?)

and merged to master in 1595e03 since I'm not allowed to push to your PR for some reason..

[umarcor]

added two commits:

Nice!

(was there a reason to not use normal make?)

My ignorance. I'm not sure to know when make is acceptable and when mingw32-make is required.

and merged to master in 1595e03 since I'm not allowed to push to your PR for some reason..

That's ok. For future PRs I'll use a personal fork, instead of an org...