Skip to content

khkim6040/CSED311

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Repository files navigation

CSED311(Computer Architecture)

Objective

Computer architecture is the science and art of selecting and interconnecting hardware components to create a computer that meets functional, performance, and cost goals.
This course introduces the basic principles and hardware structures of a modern general-purpose computer. We will learn, for example, how to design the control and datapath for a pipelined RISC processor and how to design fast memory and storage systems.
The principles presented in the lectures are reinforced in the laboratory through designing and implementing a RISC processor in Register Transfer-Level (RTL) using Verilog HDL.

Professor

Name: Gwangsun Kim

Grading Policy

(Subject to change)
Mid-term exam: 25%
Final exam: 25%
Labs: 35%
Homework: 8%

References

Computer Organization and Design RISC-V Edition: The Hardware Software Interface 2nd Edition by David A. Patterson & John L. Hennessy, Morgan Kaufamann, 2020
Computer Systems: A Programmer's Perspective by Randal E. Bryandt & David R. O'Hallaron (2nd Edition)

Lecture Schedule

  • Introduction
  • Instruction set architecture
  • Single-cycle and multi-cycle CPU
  • Pipelined CPU and hazards
  • Branch prediction, exception
  • Advanced CPU
  • Memory hierarchy, cache, cache coherence
  • Virtual memory
  • I/O
  • Memory and storage devices
  • Parallel architecture, GPU
  • Interconnection network
  • Domain-specific accelerator

About

CSED311: Computer Architecture

Topics

Resources

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published

Contributors 3

  •  
  •  
  •