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so for the first clock cycle say wmode is 1, and then in the clock cycle where the write will happen, say wmode is now 0, does the memory have to perform both a read and write in the same cycle?!
that seems to defeat the purpose of having readwrite ports...
also for the first cycle the memory can't read or write since the write doesn't happen yet.
The text was updated successfully, but these errors were encountered:
I'm confused what happens with a memory that has a readwrite port with both read-latency and write-latency of 2:
so for the first clock cycle say
wmode
is1
, and then in the clock cycle where the write will happen, saywmode
is now0
, does the memory have to perform both a read and write in the same cycle?!that seems to defeat the purpose of having readwrite ports...
also for the first cycle the memory can't read or write since the write doesn't happen yet.
The text was updated successfully, but these errors were encountered: