Refactoring

src/kernel/dev/intr.zig

@@ -276,6 +276,9 @@ pub fn init() !void {
 
     chip = try arch.intr.init();
 
+    @memset(std.mem.asBytes(&msis.buffer), 0);
+    @memset(std.mem.asBytes(&irqs.buffer), 0);
+
     log.info("Interrupt controller: {s}", .{chip.name});
 }
 
@@ -387,6 +390,8 @@ pub fn requestMsi(device: *dev.Device, handler: Handler.Fn, trigger_mode: Trigge
     chip.configMsi(msi, @truncate(idx), trigger_mode);
     msis_used += 1;
 
+    log.debug("MSI allocated: {}: {}", .{idx, vec});
+
     return @truncate(idx);
 }
 

src/kernel/dev/stds/pci.zig

@@ -55,7 +55,13 @@ pub const Device = struct {
     }
 
     pub inline fn getCurrentIntrType(self: *Device) enum{int_x,msi,msi_x} {
-        return self.intr_ctrl.data;
+        std.debug.assert(self.intr_ctrl.meta.is_allocated);
+
+        return switch (self.intr_ctrl.data) {
+            .int_x => .int_x,
+            .msi => .msi,
+            .msi_x => .msi_x
+        };
     }
 
     pub inline fn releaseInterrupts(self: *Device) void {

src/kernel/dev/stds/pci/intr.zig

@@ -4,10 +4,11 @@ const std = @import("std");
 
 const config = @import("config.zig");
 const dev = @import("../../../dev.zig");
-const vm = @import("../../../vm.zig");
+const intr = dev.intr;
 const io = dev.io;
 const log = @import("../../../log.zig");
-const intr = dev.intr;
+const utils = @import("../../../utils.zig");
+const vm = @import("../../../vm.zig");
 
 const Msi = struct {
     pub const Msi32Ref = config.ConfigSpaceGroup.Ref(config.Capability.Msi.x32);