fmcomms5_zc702: Enable AXI_SLICE for the DMA

This will increase the timing margin for the design
analogdevicesinc · Jul 18, 2018 · 235636a · 235636a
1 parent 77db4c2
commit 235636a
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/projects/fmcomms5/zc702/system_bd.tcl b/projects/fmcomms5/zc702/system_bd.tcl
@@ -8,4 +8,6 @@ source ../common/fmcomms5_bd.tcl
 
 ad_ip_parameter axi_ad9361_0 CONFIG.ADC_INIT_DELAY 24
 ad_ip_parameter axi_ad9361_1 CONFIG.ADC_INIT_DELAY 24
+ad_ip_parameter axi_ad9361_adc_dma CONFIG.AXI_SLICE_DEST 1
+ad_ip_parameter axi_ad9361_dac_dma CONFIG.AXI_SLICE_SRC 1