diff --git a/dts/nxp/mcx/MCXW716CMFTA-pinctrl.h b/dts/nxp/mcx/MCXW716CMFTA-pinctrl.h index 2d3562111..084fd9d90 100644 --- a/dts/nxp/mcx/MCXW716CMFTA-pinctrl.h +++ b/dts/nxp/mcx/MCXW716CMFTA-pinctrl.h @@ -1,6 +1,5 @@ -/* +/* SPDX-License-Identifier: Apache-2.0 * Copyright 2024 NXP - * SPDX-License-Identifier: Apache-2.0 * * NOTE: Autogenerated file by gen_soc_headers.py * for MCXW716CMFTA/signal_configuration.xml @@ -14,216 +13,216 @@ (((pin) & 0x3F) << 22) | \ (((mux) & 0xF) << 8)) -#define PTA0 KINETIS_MUX('A',0,1) /* PTA_0 */ -#define WUU0_P0_PTA0 KINETIS_MUX('A',0,1) /* PTA_0 */ -#define CMP0_OUT_PTA0 KINETIS_MUX('A',0,2) /* PTA_0 */ -#define LPUART0_CTS_b_PTA0 KINETIS_MUX('A',0,3) /* PTA_0 */ -#define RF_GPO_11_PTA0 KINETIS_MUX('A',0,4) /* PTA_0 */ -#define TPM0_CH4_PTA0 KINETIS_MUX('A',0,5) /* PTA_0 */ -#define FLEXIO0_D0_PTA0 KINETIS_MUX('A',0,6) /* PTA_0 */ -#define SWD_DIO_PTA0 KINETIS_MUX('A',0,7) /* PTA_0 */ -#define PTA1 KINETIS_MUX('A',1,1) /* PTA_1 */ -#define CMP1_OUT_PTA1 KINETIS_MUX('A',1,2) /* PTA_1 */ -#define LPUART0_RTS_b_PTA1 KINETIS_MUX('A',1,3) /* PTA_1 */ -#define RF_GPO_10_PTA1 KINETIS_MUX('A',1,4) /* PTA_1 */ -#define TPM0_CH5_PTA1 KINETIS_MUX('A',1,5) /* PTA_1 */ -#define FLEXIO0_D1_PTA1 KINETIS_MUX('A',1,6) /* PTA_1 */ -#define SWD_CLK_PTA1 KINETIS_MUX('A',1,7) /* PTA_1 */ -#define ADC0_A10_PTA4 KINETIS_MUX('A',4,0) /* PTA_4 */ -#define CMP0_IN0_PTA4 KINETIS_MUX('A',4,0) /* PTA_4 */ -#define PTA4 KINETIS_MUX('A',4,1) /* PTA_4 */ -#define RF_XTAL_OUT_ENABLE_PTA4 KINETIS_MUX('A',4,1) /* PTA_4 */ -#define WUU0_P2_PTA4 KINETIS_MUX('A',4,1) /* PTA_4 */ -#define RF_GPO_9_PTA4 KINETIS_MUX('A',4,3) /* PTA_4 */ -#define TPM0_CLKIN_PTA4 KINETIS_MUX('A',4,4) /* PTA_4 */ -#define TRACE_SWO_PTA4 KINETIS_MUX('A',4,5) /* PTA_4 */ -#define FLEXIO0_D4_PTA4 KINETIS_MUX('A',4,6) /* PTA_4 */ -#define BOOT_CONFIG_PTA4 KINETIS_MUX('A',4,7) /* PTA_4 */ -#define ADC0_A12_PTA16 KINETIS_MUX('A',16,0) /* PTA_16 */ -#define RF_NOT_ALLOWED_PTA16 KINETIS_MUX('A',16,1) /* PTA_16 */ -#define PTA16 KINETIS_MUX('A',16,1) /* PTA_16 */ -#define LPSPI0_PCS0_PTA16 KINETIS_MUX('A',16,2) /* PTA_16 */ -#define EWM0_OUT_b_PTA16 KINETIS_MUX('A',16,3) /* PTA_16 */ -#define LPI2C0_SCLS_PTA16 KINETIS_MUX('A',16,4) /* PTA_16 */ -#define TPM0_CH4_PTA16 KINETIS_MUX('A',16,5) /* PTA_16 */ -#define LPUART0_RX_PTA16 KINETIS_MUX('A',16,6) /* PTA_16 */ -#define RF_GPO_8_PTA16 KINETIS_MUX('A',16,7) /* PTA_16 */ -#define FLEXIO0_D5_PTA16 KINETIS_MUX('A',16,9) /* PTA_16 */ -#define ADC0_A13_PTA17 KINETIS_MUX('A',17,0) /* PTA_17 */ -#define RF_NOT_ALLOWED_PTA17 KINETIS_MUX('A',17,1) /* PTA_17 */ -#define WUU0_P3_PTA17 KINETIS_MUX('A',17,1) /* PTA_17 */ -#define PTA17 KINETIS_MUX('A',17,1) /* PTA_17 */ -#define LPSPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA_17 */ -#define EWM0_IN_PTA17 KINETIS_MUX('A',17,3) /* PTA_17 */ -#define LPI2C0_SDAS_PTA17 KINETIS_MUX('A',17,4) /* PTA_17 */ -#define TPM0_CH5_PTA17 KINETIS_MUX('A',17,5) /* PTA_17 */ -#define LPUART0_TX_PTA17 KINETIS_MUX('A',17,6) /* PTA_17 */ -#define RF_GPO_7_PTA17 KINETIS_MUX('A',17,7) /* PTA_17 */ -#define RF_GPO_8_PTA17 KINETIS_MUX('A',17,8) /* PTA_17 */ -#define FLEXIO0_D6_PTA17 KINETIS_MUX('A',17,9) /* PTA_17 */ -#define RF_EXT_XTAL_REQUEST_PTA17 KINETIS_MUX('A',17,11) /* PTA_17 */ -#define CMP1_IN1_PTA18 KINETIS_MUX('A',18,0) /* PTA_18 */ -#define PTA18 KINETIS_MUX('A',18,1) /* PTA_18 */ -#define LPSPI0_SOUT_PTA18 KINETIS_MUX('A',18,2) /* PTA_18 */ -#define LPUART0_CTS_b_PTA18 KINETIS_MUX('A',18,3) /* PTA_18 */ -#define LPI2C0_SDA_PTA18 KINETIS_MUX('A',18,4) /* PTA_18 */ -#define TPM0_CH3_PTA18 KINETIS_MUX('A',18,5) /* PTA_18 */ -#define RF_GPO_0_PTA18 KINETIS_MUX('A',18,6) /* PTA_18 */ -#define LPUART0_RX_PTA18 KINETIS_MUX('A',18,10) /* PTA_18 */ -#define SPC0_LPREQ_PTA18 KINETIS_MUX('A',18,11) /* PTA_18 */ -#define CMP1_IN0_PTA19 KINETIS_MUX('A',19,0) /* PTA_19 */ -#define PTA19 KINETIS_MUX('A',19,1) /* PTA_19 */ -#define WUU0_P4_PTA19 KINETIS_MUX('A',19,1) /* PTA_19 */ -#define LPSPI0_SCK_PTA19 KINETIS_MUX('A',19,2) /* PTA_19 */ -#define LPUART0_RTS_b_PTA19 KINETIS_MUX('A',19,3) /* PTA_19 */ -#define LPI2C0_SCL_PTA19 KINETIS_MUX('A',19,4) /* PTA_19 */ -#define TPM0_CH2_PTA19 KINETIS_MUX('A',19,5) /* PTA_19 */ -#define RF_GPO_1_PTA19 KINETIS_MUX('A',19,6) /* PTA_19 */ -#define CMP0_IN3_PTA20 KINETIS_MUX('A',20,0) /* PTA_20 */ -#define ADC0_A14_PTA20 KINETIS_MUX('A',20,0) /* PTA_20 */ -#define PTA20 KINETIS_MUX('A',20,1) /* PTA_20 */ -#define LPSPI0_PCS2_PTA20 KINETIS_MUX('A',20,2) /* PTA_20 */ -#define LPUART0_TX_PTA20 KINETIS_MUX('A',20,3) /* PTA_20 */ -#define EWM0_IN_PTA20 KINETIS_MUX('A',20,4) /* PTA_20 */ -#define TPM0_CH1_PTA20 KINETIS_MUX('A',20,5) /* PTA_20 */ -#define RF_GPO_2_PTA20 KINETIS_MUX('A',20,6) /* PTA_20 */ -#define FLEXIO0_D7_PTA20 KINETIS_MUX('A',20,8) /* PTA_20 */ -#define ADC0_A15_PTA21 KINETIS_MUX('A',21,0) /* PTA_21 */ -#define CMP0_IN2_PTA21 KINETIS_MUX('A',21,0) /* PTA_21 */ -#define PTA21 KINETIS_MUX('A',21,1) /* PTA_21 */ -#define WUU0_P5_PTA21 KINETIS_MUX('A',21,1) /* PTA_21 */ -#define LPSPI0_PCS3_PTA21 KINETIS_MUX('A',21,2) /* PTA_21 */ -#define LPUART0_RX_PTA21 KINETIS_MUX('A',21,3) /* PTA_21 */ -#define EWM0_OUT_b_PTA21 KINETIS_MUX('A',21,4) /* PTA_21 */ -#define TPM0_CH0_PTA21 KINETIS_MUX('A',21,5) /* PTA_21 */ -#define RF_GPO_3_PTA21 KINETIS_MUX('A',21,6) /* PTA_21 */ -#define RF_GPO_7_PTA21 KINETIS_MUX('A',21,7) /* PTA_21 */ -#define FLEXIO0_D8_PTA21 KINETIS_MUX('A',21,8) /* PTA_21 */ -#define RF_GPO_10_PTA21 KINETIS_MUX('A',21,9) /* PTA_21 */ -#define ADC0_B10_PTB0 KINETIS_MUX('B',0,0) /* PTB_0 */ -#define PTB0 KINETIS_MUX('B',0,1) /* PTB_0 */ -#define WUU0_P13_PTB0 KINETIS_MUX('B',0,1) /* PTB_0 */ -#define LPSPI1_PCS0_PTB0 KINETIS_MUX('B',0,2) /* PTB_0 */ -#define TPM1_CH0_PTB0 KINETIS_MUX('B',0,5) /* PTB_0 */ -#define FLEXIO0_D26_PTB0 KINETIS_MUX('B',0,9) /* PTB_0 */ -#define ADC0_B11_PTB1 KINETIS_MUX('B',1,0) /* PTB_1 */ -#define PTB1 KINETIS_MUX('B',1,1) /* PTB_1 */ -#define LPSPI1_SIN_PTB1 KINETIS_MUX('B',1,2) /* PTB_1 */ -#define TPM1_CH1_PTB1 KINETIS_MUX('B',1,5) /* PTB_1 */ -#define FLEXIO0_D27_PTB1 KINETIS_MUX('B',1,9) /* PTB_1 */ -#define ADC0_B12_PTB2 KINETIS_MUX('B',2,0) /* PTB_2 */ -#define PTB2 KINETIS_MUX('B',2,1) /* PTB_2 */ -#define LPSPI1_SCK_PTB2 KINETIS_MUX('B',2,2) /* PTB_2 */ -#define LPUART1_TX_PTB2 KINETIS_MUX('B',2,3) /* PTB_2 */ -#define TPM1_CH2_PTB2 KINETIS_MUX('B',2,5) /* PTB_2 */ -#define FLEXIO0_D28_PTB2 KINETIS_MUX('B',2,9) /* PTB_2 */ -#define ADC0_B13_PTB3 KINETIS_MUX('B',3,0) /* PTB_3 */ -#define PTB3 KINETIS_MUX('B',3,1) /* PTB_3 */ -#define WUU0_P14_PTB3 KINETIS_MUX('B',3,1) /* PTB_3 */ -#define LPSPI1_SOUT_PTB3 KINETIS_MUX('B',3,2) /* PTB_3 */ -#define LPUART1_RX_PTB3 KINETIS_MUX('B',3,3) /* PTB_3 */ -#define TPM1_CH3_PTB3 KINETIS_MUX('B',3,5) /* PTB_3 */ -#define FLEXIO0_D29_PTB3 KINETIS_MUX('B',3,9) /* PTB_3 */ -#define WUU0_P15_PTB4 KINETIS_MUX('B',4,1) /* PTB_4 */ -#define PTB4 KINETIS_MUX('B',4,1) /* PTB_4 */ -#define LPSPI1_PCS3_PTB4 KINETIS_MUX('B',4,2) /* PTB_4 */ -#define LPUART1_CTS_b_PTB4 KINETIS_MUX('B',4,3) /* PTB_4 */ -#define LPI2C1_SDA_PTB4 KINETIS_MUX('B',4,4) /* PTB_4 */ -#define I3C0_SDA_PTB4 KINETIS_MUX('B',4,5) /* PTB_4 */ -#define TRGMUX0_IN0_PTB4 KINETIS_MUX('B',4,6) /* PTB_4 */ -#define FLEXIO0_D30_PTB4 KINETIS_MUX('B',4,9) /* PTB_4 */ -#define PTB5 KINETIS_MUX('B',5,1) /* PTB_5 */ -#define LPSPI1_PCS2_PTB5 KINETIS_MUX('B',5,2) /* PTB_5 */ -#define LPUART1_RTS_b_PTB5 KINETIS_MUX('B',5,3) /* PTB_5 */ -#define LPI2C1_SCL_PTB5 KINETIS_MUX('B',5,4) /* PTB_5 */ -#define I3C0_SCL_PTB5 KINETIS_MUX('B',5,5) /* PTB_5 */ -#define TRGMUX0_OUT0_PTB5 KINETIS_MUX('B',5,6) /* PTB_5 */ -#define FLEXIO0_D31_PTB5 KINETIS_MUX('B',5,9) /* PTB_5 */ -#define PTC0 KINETIS_MUX('C',0,1) /* PTC_0 */ -#define WUU0_P7_PTC0 KINETIS_MUX('C',0,1) /* PTC_0 */ -#define LPSPI1_PCS2_PTC0 KINETIS_MUX('C',0,2) /* PTC_0 */ -#define CAN0_TX_PTC0 KINETIS_MUX('C',0,3) /* PTC_0 */ -#define I3C0_SDA_PTC0 KINETIS_MUX('C',0,4) /* PTC_0 */ -#define TPM1_CH0_PTC0 KINETIS_MUX('C',0,5) /* PTC_0 */ -#define LPI2C1_SCL_PTC0 KINETIS_MUX('C',0,7) /* PTC_0 */ -#define FLEXIO0_D16_PTC0 KINETIS_MUX('C',0,9) /* PTC_0 */ -#define PTC1 KINETIS_MUX('C',1,1) /* PTC_1 */ -#define WUU0_P8_PTC1 KINETIS_MUX('C',1,1) /* PTC_1 */ -#define LPSPI1_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC_1 */ -#define CAN0_RX_PTC1 KINETIS_MUX('C',1,3) /* PTC_1 */ -#define I3C0_SCL_PTC1 KINETIS_MUX('C',1,4) /* PTC_1 */ -#define TPM1_CH1_PTC1 KINETIS_MUX('C',1,5) /* PTC_1 */ -#define LPI2C1_SDA_PTC1 KINETIS_MUX('C',1,7) /* PTC_1 */ -#define FLEXIO0_D17_PTC1 KINETIS_MUX('C',1,9) /* PTC_1 */ -#define WUU0_P9_PTC2 KINETIS_MUX('C',2,1) /* PTC_2 */ -#define PTC2 KINETIS_MUX('C',2,1) /* PTC_2 */ -#define LPSPI1_SOUT_PTC2 KINETIS_MUX('C',2,2) /* PTC_2 */ -#define LPUART1_RX_PTC2 KINETIS_MUX('C',2,3) /* PTC_2 */ -#define LPI2C1_SCLS_PTC2 KINETIS_MUX('C',2,4) /* PTC_2 */ -#define TPM1_CH2_PTC2 KINETIS_MUX('C',2,5) /* PTC_2 */ -#define I3C0_PUR_PTC2 KINETIS_MUX('C',2,7) /* PTC_2 */ -#define FLEXIO0_D18_PTC2 KINETIS_MUX('C',2,9) /* PTC_2 */ -#define PTC3 KINETIS_MUX('C',3,1) /* PTC_3 */ -#define LPSPI1_SCK_PTC3 KINETIS_MUX('C',3,2) /* PTC_3 */ -#define LPUART1_TX_PTC3 KINETIS_MUX('C',3,3) /* PTC_3 */ -#define LPI2C1_SDAS_PTC3 KINETIS_MUX('C',3,4) /* PTC_3 */ -#define TPM1_CH3_PTC3 KINETIS_MUX('C',3,5) /* PTC_3 */ -#define FLEXIO0_D19_PTC3 KINETIS_MUX('C',3,9) /* PTC_3 */ -#define PTC4 KINETIS_MUX('C',4,1) /* PTC_4 */ -#define WUU0_P10_PTC4 KINETIS_MUX('C',4,1) /* PTC_4 */ -#define LPSPI1_SIN_PTC4 KINETIS_MUX('C',4,2) /* PTC_4 */ -#define CAN0_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC_4 */ -#define LPI2C1_SCL_PTC4 KINETIS_MUX('C',4,4) /* PTC_4 */ -#define TPM2_CH0_PTC4 KINETIS_MUX('C',4,6) /* PTC_4 */ -#define FLEXIO0_D20_PTC4 KINETIS_MUX('C',4,9) /* PTC_4 */ -#define PTC5 KINETIS_MUX('C',5,1) /* PTC_5 */ -#define LPSPI1_PCS0_PTC5 KINETIS_MUX('C',5,2) /* PTC_5 */ -#define CAN0_RX_PTC5 KINETIS_MUX('C',5,3) /* PTC_5 */ -#define LPI2C1_SDA_PTC5 KINETIS_MUX('C',5,4) /* PTC_5 */ -#define TPM1_CH4_PTC5 KINETIS_MUX('C',5,5) /* PTC_5 */ -#define TPM2_CH1_PTC5 KINETIS_MUX('C',5,6) /* PTC_5 */ -#define FLEXIO0_D21_PTC5 KINETIS_MUX('C',5,9) /* PTC_5 */ -#define ADC0_A8_PTC6 KINETIS_MUX('C',6,0) /* PTC_6 */ -#define PTC6 KINETIS_MUX('C',6,1) /* PTC_6 */ -#define WUU0_P11_PTC6 KINETIS_MUX('C',6,1) /* PTC_6 */ -#define LPSPI1_PCS1_PTC6 KINETIS_MUX('C',6,2) /* PTC_6 */ -#define TPM1_CH5_PTC6 KINETIS_MUX('C',6,5) /* PTC_6 */ -#define FLEXIO0_D22_PTC6 KINETIS_MUX('C',6,9) /* PTC_6 */ -#define NMI_b_PTC7 KINETIS_MUX('C',7,1) /* PTC_7 */ -#define WUU0_P12_PTC7 KINETIS_MUX('C',7,1) /* PTC_7 */ -#define RF_NOT_ALLOWED_PTC7 KINETIS_MUX('C',7,1) /* PTC_7 */ -#define PTC7 KINETIS_MUX('C',7,1) /* PTC_7 */ -#define TRGMUX0_IN3_PTC7 KINETIS_MUX('C',7,2) /* PTC_7 */ -#define TRGMUX0_OUT3_PTC7 KINETIS_MUX('C',7,3) /* PTC_7 */ -#define SFA0_CLK_PTC7 KINETIS_MUX('C',7,4) /* PTC_7 */ -#define TPM1_CLKIN_PTC7 KINETIS_MUX('C',7,5) /* PTC_7 */ -#define TPM2_CLKIN_PTC7 KINETIS_MUX('C',7,6) /* PTC_7 */ -#define CLKOUT_PTC7 KINETIS_MUX('C',7,7) /* PTC_7 */ -#define FLEXIO0_D23_PTC7 KINETIS_MUX('C',7,9) /* PTC_7 */ -#define ADC0_A5_PTD0 KINETIS_MUX('D',0,0) /* PTD_0 */ -#define PTD0 KINETIS_MUX('D',0,1) /* PTD_0 */ -#define RESET_b_PTD0 KINETIS_MUX('D',0,3) /* PTD_0 */ -#define ADC0_B5_PTD1 KINETIS_MUX('D',1,0) /* PTD_1 */ -#define PTD1 KINETIS_MUX('D',1,1) /* PTD_1 */ -#define SPC0_LPREQ_PTD1 KINETIS_MUX('D',1,2) /* PTD_1 */ -#define NMI_b_PTD1 KINETIS_MUX('D',1,3) /* PTD_1 */ -#define RF_GPO_4_PTD1 KINETIS_MUX('D',1,4) /* PTD_1 */ -#define ADC0_A6_PTD2 KINETIS_MUX('D',2,0) /* PTD_2 */ -#define PTD2 KINETIS_MUX('D',2,1) /* PTD_2 */ -#define LPTMR0_ALT3_PTD2 KINETIS_MUX('D',2,2) /* PTD_2 */ -#define TAMPER0_PTD2 KINETIS_MUX('D',2,3) /* PTD_2 */ -#define RF_GPO_5_PTD2 KINETIS_MUX('D',2,4) /* PTD_2 */ -#define ADC0_B6_PTD3 KINETIS_MUX('D',3,0) /* PTD_3 */ -#define PTD3 KINETIS_MUX('D',3,1) /* PTD_3 */ -#define LPTMR1_ALT3_PTD3 KINETIS_MUX('D',3,2) /* PTD_3 */ -#define TAMPER1_PTD3 KINETIS_MUX('D',3,3) /* PTD_3 */ -#define RF_GPO_6_PTD3 KINETIS_MUX('D',3,4) /* PTD_3 */ -#define TRGMUX0_IN2_PTD3 KINETIS_MUX('D',3,6) /* PTD_3 */ -#define XTAL32K_PTD4 KINETIS_MUX('D',4,0) /* PTD_4 */ -#define PTD4 KINETIS_MUX('D',4,1) /* PTD_4 */ -#define LPTMR0_ALT2_PTD4 KINETIS_MUX('D',4,2) /* PTD_4 */ -#define TAMPER2_PTD4 KINETIS_MUX('D',4,3) /* PTD_4 */ -#define EXTAL32K_PTD5 KINETIS_MUX('D',5,0) /* PTD_5 */ -#define PTD5 KINETIS_MUX('D',5,1) /* PTD_5 */ -#define LPTMR1_ALT2_PTD5 KINETIS_MUX('D',5,2) /* PTD_5 */ +#define PTA0 KINETIS_MUX('A', 0, 1) /* PTA_0 */ +#define WUU0_P0_PTA0 KINETIS_MUX('A', 0, 1) /* PTA_0 */ +#define CMP0_OUT_PTA0 KINETIS_MUX('A', 0, 2) /* PTA_0 */ +#define LPUART0_CTS_b_PTA0 KINETIS_MUX('A', 0, 3) /* PTA_0 */ +#define RF_GPO_11_PTA0 KINETIS_MUX('A', 0, 4) /* PTA_0 */ +#define TPM0_CH4_PTA0 KINETIS_MUX('A', 0, 5) /* PTA_0 */ +#define FLEXIO0_D0_PTA0 KINETIS_MUX('A', 0, 6) /* PTA_0 */ +#define SWD_DIO_PTA0 KINETIS_MUX('A', 0, 7) /* PTA_0 */ +#define PTA1 KINETIS_MUX('A', 1, 1) /* PTA_1 */ +#define CMP1_OUT_PTA1 KINETIS_MUX('A', 1, 2) /* PTA_1 */ +#define LPUART0_RTS_b_PTA1 KINETIS_MUX('A', 1, 3) /* PTA_1 */ +#define RF_GPO_10_PTA1 KINETIS_MUX('A', 1, 4) /* PTA_1 */ +#define TPM0_CH5_PTA1 KINETIS_MUX('A', 1, 5) /* PTA_1 */ +#define FLEXIO0_D1_PTA1 KINETIS_MUX('A', 1, 6) /* PTA_1 */ +#define SWD_CLK_PTA1 KINETIS_MUX('A', 1, 7) /* PTA_1 */ +#define ADC0_A10_PTA4 KINETIS_MUX('A', 4, 0) /* PTA_4 */ +#define CMP0_IN0_PTA4 KINETIS_MUX('A', 4, 0) /* PTA_4 */ +#define PTA4 KINETIS_MUX('A', 4, 1) /* PTA_4 */ +#define RF_XTAL_OUT_ENABLE_PTA4 KINETIS_MUX('A', 4, 1) /* PTA_4 */ +#define WUU0_P2_PTA4 KINETIS_MUX('A', 4, 1) /* PTA_4 */ +#define RF_GPO_9_PTA4 KINETIS_MUX('A', 4, 3) /* PTA_4 */ +#define TPM0_CLKIN_PTA4 KINETIS_MUX('A', 4, 4) /* PTA_4 */ +#define TRACE_SWO_PTA4 KINETIS_MUX('A', 4, 5) /* PTA_4 */ +#define FLEXIO0_D4_PTA4 KINETIS_MUX('A', 4, 6) /* PTA_4 */ +#define BOOT_CONFIG_PTA4 KINETIS_MUX('A', 4, 7) /* PTA_4 */ +#define ADC0_A12_PTA16 KINETIS_MUX('A', 16, 0) /* PTA_16 */ +#define RF_NOT_ALLOWED_PTA16 KINETIS_MUX('A', 16, 1) /* PTA_16 */ +#define PTA16 KINETIS_MUX('A', 16, 1) /* PTA_16 */ +#define LPSPI0_PCS0_PTA16 KINETIS_MUX('A', 16, 2) /* PTA_16 */ +#define EWM0_OUT_b_PTA16 KINETIS_MUX('A', 16, 3) /* PTA_16 */ +#define LPI2C0_SCLS_PTA16 KINETIS_MUX('A', 16, 4) /* PTA_16 */ +#define TPM0_CH4_PTA16 KINETIS_MUX('A', 16, 5) /* PTA_16 */ +#define LPUART0_RX_PTA16 KINETIS_MUX('A', 16, 6) /* PTA_16 */ +#define RF_GPO_8_PTA16 KINETIS_MUX('A', 16, 7) /* PTA_16 */ +#define FLEXIO0_D5_PTA16 KINETIS_MUX('A', 16, 9) /* PTA_16 */ +#define ADC0_A13_PTA17 KINETIS_MUX('A', 17, 0) /* PTA_17 */ +#define RF_NOT_ALLOWED_PTA17 KINETIS_MUX('A', 17, 1) /* PTA_17 */ +#define WUU0_P3_PTA17 KINETIS_MUX('A', 17, 1) /* PTA_17 */ +#define PTA17 KINETIS_MUX('A', 17, 1) /* PTA_17 */ +#define LPSPI0_SIN_PTA17 KINETIS_MUX('A', 17, 2) /* PTA_17 */ +#define EWM0_IN_PTA17 KINETIS_MUX('A', 17, 3) /* PTA_17 */ +#define LPI2C0_SDAS_PTA17 KINETIS_MUX('A', 17, 4) /* PTA_17 */ +#define TPM0_CH5_PTA17 KINETIS_MUX('A', 17, 5) /* PTA_17 */ +#define LPUART0_TX_PTA17 KINETIS_MUX('A', 17, 6) /* PTA_17 */ +#define RF_GPO_7_PTA17 KINETIS_MUX('A', 17, 7) /* PTA_17 */ +#define RF_GPO_8_PTA17 KINETIS_MUX('A', 17, 8) /* PTA_17 */ +#define FLEXIO0_D6_PTA17 KINETIS_MUX('A', 17, 9) /* PTA_17 */ +#define RF_EXT_XTAL_REQUEST_PTA17 KINETIS_MUX('A', 17, 11) /* PTA_17 */ +#define CMP1_IN1_PTA18 KINETIS_MUX('A', 18, 0) /* PTA_18 */ +#define PTA18 KINETIS_MUX('A', 18, 1) /* PTA_18 */ +#define LPSPI0_SOUT_PTA18 KINETIS_MUX('A', 18, 2) /* PTA_18 */ +#define LPUART0_CTS_b_PTA18 KINETIS_MUX('A', 18, 3) /* PTA_18 */ +#define LPI2C0_SDA_PTA18 KINETIS_MUX('A', 18, 4) /* PTA_18 */ +#define TPM0_CH3_PTA18 KINETIS_MUX('A', 18, 5) /* PTA_18 */ +#define RF_GPO_0_PTA18 KINETIS_MUX('A', 18, 6) /* PTA_18 */ +#define LPUART0_RX_PTA18 KINETIS_MUX('A', 18, 10) /* PTA_18 */ +#define SPC0_LPREQ_PTA18 KINETIS_MUX('A', 18, 11) /* PTA_18 */ +#define CMP1_IN0_PTA19 KINETIS_MUX('A', 19, 0) /* PTA_19 */ +#define PTA19 KINETIS_MUX('A', 19, 1) /* PTA_19 */ +#define WUU0_P4_PTA19 KINETIS_MUX('A', 19, 1) /* PTA_19 */ +#define LPSPI0_SCK_PTA19 KINETIS_MUX('A', 19, 2) /* PTA_19 */ +#define LPUART0_RTS_b_PTA19 KINETIS_MUX('A', 19, 3) /* PTA_19 */ +#define LPI2C0_SCL_PTA19 KINETIS_MUX('A', 19, 4) /* PTA_19 */ +#define TPM0_CH2_PTA19 KINETIS_MUX('A', 19, 5) /* PTA_19 */ +#define RF_GPO_1_PTA19 KINETIS_MUX('A', 19, 6) /* PTA_19 */ +#define CMP0_IN3_PTA20 KINETIS_MUX('A', 20, 0) /* PTA_20 */ +#define ADC0_A14_PTA20 KINETIS_MUX('A', 20, 0) /* PTA_20 */ +#define PTA20 KINETIS_MUX('A', 20, 1) /* PTA_20 */ +#define LPSPI0_PCS2_PTA20 KINETIS_MUX('A', 20, 2) /* PTA_20 */ +#define LPUART0_TX_PTA20 KINETIS_MUX('A', 20, 3) /* PTA_20 */ +#define EWM0_IN_PTA20 KINETIS_MUX('A', 20, 4) /* PTA_20 */ +#define TPM0_CH1_PTA20 KINETIS_MUX('A', 20, 5) /* PTA_20 */ +#define RF_GPO_2_PTA20 KINETIS_MUX('A', 20, 6) /* PTA_20 */ +#define FLEXIO0_D7_PTA20 KINETIS_MUX('A', 20, 8) /* PTA_20 */ +#define ADC0_A15_PTA21 KINETIS_MUX('A', 21, 0) /* PTA_21 */ +#define CMP0_IN2_PTA21 KINETIS_MUX('A', 21, 0) /* PTA_21 */ +#define PTA21 KINETIS_MUX('A', 21, 1) /* PTA_21 */ +#define WUU0_P5_PTA21 KINETIS_MUX('A', 21, 1) /* PTA_21 */ +#define LPSPI0_PCS3_PTA21 KINETIS_MUX('A', 21, 2) /* PTA_21 */ +#define LPUART0_RX_PTA21 KINETIS_MUX('A', 21, 3) /* PTA_21 */ +#define EWM0_OUT_b_PTA21 KINETIS_MUX('A', 21, 4) /* PTA_21 */ +#define TPM0_CH0_PTA21 KINETIS_MUX('A', 21, 5) /* PTA_21 */ +#define RF_GPO_3_PTA21 KINETIS_MUX('A', 21, 6) /* PTA_21 */ +#define RF_GPO_7_PTA21 KINETIS_MUX('A', 21, 7) /* PTA_21 */ +#define FLEXIO0_D8_PTA21 KINETIS_MUX('A', 21, 8) /* PTA_21 */ +#define RF_GPO_10_PTA21 KINETIS_MUX('A', 21, 9) /* PTA_21 */ +#define ADC0_B10_PTB0 KINETIS_MUX('B', 0, 0) /* PTB_0 */ +#define PTB0 KINETIS_MUX('B', 0, 1) /* PTB_0 */ +#define WUU0_P13_PTB0 KINETIS_MUX('B', 0, 1) /* PTB_0 */ +#define LPSPI1_PCS0_PTB0 KINETIS_MUX('B', 0, 2) /* PTB_0 */ +#define TPM1_CH0_PTB0 KINETIS_MUX('B', 0, 5) /* PTB_0 */ +#define FLEXIO0_D26_PTB0 KINETIS_MUX('B', 0, 9) /* PTB_0 */ +#define ADC0_B11_PTB1 KINETIS_MUX('B', 1, 0) /* PTB_1 */ +#define PTB1 KINETIS_MUX('B', 1, 1) /* PTB_1 */ +#define LPSPI1_SIN_PTB1 KINETIS_MUX('B', 1, 2) /* PTB_1 */ +#define TPM1_CH1_PTB1 KINETIS_MUX('B', 1, 5) /* PTB_1 */ +#define FLEXIO0_D27_PTB1 KINETIS_MUX('B', 1, 9) /* PTB_1 */ +#define ADC0_B12_PTB2 KINETIS_MUX('B', 2, 0) /* PTB_2 */ +#define PTB2 KINETIS_MUX('B', 2, 1) /* PTB_2 */ +#define LPSPI1_SCK_PTB2 KINETIS_MUX('B', 2, 2) /* PTB_2 */ +#define LPUART1_TX_PTB2 KINETIS_MUX('B', 2, 3) /* PTB_2 */ +#define TPM1_CH2_PTB2 KINETIS_MUX('B', 2, 5) /* PTB_2 */ +#define FLEXIO0_D28_PTB2 KINETIS_MUX('B', 2, 9) /* PTB_2 */ +#define ADC0_B13_PTB3 KINETIS_MUX('B', 3, 0) /* PTB_3 */ +#define PTB3 KINETIS_MUX('B', 3, 1) /* PTB_3 */ +#define WUU0_P14_PTB3 KINETIS_MUX('B', 3, 1) /* PTB_3 */ +#define LPSPI1_SOUT_PTB3 KINETIS_MUX('B', 3, 2) /* PTB_3 */ +#define LPUART1_RX_PTB3 KINETIS_MUX('B', 3, 3) /* PTB_3 */ +#define TPM1_CH3_PTB3 KINETIS_MUX('B', 3, 5) /* PTB_3 */ +#define FLEXIO0_D29_PTB3 KINETIS_MUX('B', 3, 9) /* PTB_3 */ +#define WUU0_P15_PTB4 KINETIS_MUX('B', 4, 1) /* PTB_4 */ +#define PTB4 KINETIS_MUX('B', 4, 1) /* PTB_4 */ +#define LPSPI1_PCS3_PTB4 KINETIS_MUX('B', 4, 2) /* PTB_4 */ +#define LPUART1_CTS_b_PTB4 KINETIS_MUX('B', 4, 3) /* PTB_4 */ +#define LPI2C1_SDA_PTB4 KINETIS_MUX('B', 4, 4) /* PTB_4 */ +#define I3C0_SDA_PTB4 KINETIS_MUX('B', 4, 5) /* PTB_4 */ +#define TRGMUX0_IN0_PTB4 KINETIS_MUX('B', 4, 6) /* PTB_4 */ +#define FLEXIO0_D30_PTB4 KINETIS_MUX('B', 4, 9) /* PTB_4 */ +#define PTB5 KINETIS_MUX('B', 5, 1) /* PTB_5 */ +#define LPSPI1_PCS2_PTB5 KINETIS_MUX('B', 5, 2) /* PTB_5 */ +#define LPUART1_RTS_b_PTB5 KINETIS_MUX('B', 5, 3) /* PTB_5 */ +#define LPI2C1_SCL_PTB5 KINETIS_MUX('B', 5, 4) /* PTB_5 */ +#define I3C0_SCL_PTB5 KINETIS_MUX('B', 5, 5) /* PTB_5 */ +#define TRGMUX0_OUT0_PTB5 KINETIS_MUX('B', 5, 6) /* PTB_5 */ +#define FLEXIO0_D31_PTB5 KINETIS_MUX('B', 5, 9) /* PTB_5 */ +#define PTC0 KINETIS_MUX('C', 0, 1) /* PTC_0 */ +#define WUU0_P7_PTC0 KINETIS_MUX('C', 0, 1) /* PTC_0 */ +#define LPSPI1_PCS2_PTC0 KINETIS_MUX('C', 0, 2) /* PTC_0 */ +#define CAN0_TX_PTC0 KINETIS_MUX('C', 0, 3) /* PTC_0 */ +#define I3C0_SDA_PTC0 KINETIS_MUX('C', 0, 4) /* PTC_0 */ +#define TPM1_CH0_PTC0 KINETIS_MUX('C', 0, 5) /* PTC_0 */ +#define LPI2C1_SCL_PTC0 KINETIS_MUX('C', 0, 7) /* PTC_0 */ +#define FLEXIO0_D16_PTC0 KINETIS_MUX('C', 0, 9) /* PTC_0 */ +#define PTC1 KINETIS_MUX('C', 1, 1) /* PTC_1 */ +#define WUU0_P8_PTC1 KINETIS_MUX('C', 1, 1) /* PTC_1 */ +#define LPSPI1_PCS3_PTC1 KINETIS_MUX('C', 1, 2) /* PTC_1 */ +#define CAN0_RX_PTC1 KINETIS_MUX('C', 1, 3) /* PTC_1 */ +#define I3C0_SCL_PTC1 KINETIS_MUX('C', 1, 4) /* PTC_1 */ +#define TPM1_CH1_PTC1 KINETIS_MUX('C', 1, 5) /* PTC_1 */ +#define LPI2C1_SDA_PTC1 KINETIS_MUX('C', 1, 7) /* PTC_1 */ +#define FLEXIO0_D17_PTC1 KINETIS_MUX('C', 1, 9) /* PTC_1 */ +#define WUU0_P9_PTC2 KINETIS_MUX('C', 2, 1) /* PTC_2 */ +#define PTC2 KINETIS_MUX('C', 2, 1) /* PTC_2 */ +#define LPSPI1_SOUT_PTC2 KINETIS_MUX('C', 2, 2) /* PTC_2 */ +#define LPUART1_RX_PTC2 KINETIS_MUX('C', 2, 3) /* PTC_2 */ +#define LPI2C1_SCLS_PTC2 KINETIS_MUX('C', 2, 4) /* PTC_2 */ +#define TPM1_CH2_PTC2 KINETIS_MUX('C', 2, 5) /* PTC_2 */ +#define I3C0_PUR_PTC2 KINETIS_MUX('C', 2, 7) /* PTC_2 */ +#define FLEXIO0_D18_PTC2 KINETIS_MUX('C', 2, 9) /* PTC_2 */ +#define PTC3 KINETIS_MUX('C', 3, 1) /* PTC_3 */ +#define LPSPI1_SCK_PTC3 KINETIS_MUX('C', 3, 2) /* PTC_3 */ +#define LPUART1_TX_PTC3 KINETIS_MUX('C', 3, 3) /* PTC_3 */ +#define LPI2C1_SDAS_PTC3 KINETIS_MUX('C', 3, 4) /* PTC_3 */ +#define TPM1_CH3_PTC3 KINETIS_MUX('C', 3, 5) /* PTC_3 */ +#define FLEXIO0_D19_PTC3 KINETIS_MUX('C', 3, 9) /* PTC_3 */ +#define PTC4 KINETIS_MUX('C', 4, 1) /* PTC_4 */ +#define WUU0_P10_PTC4 KINETIS_MUX('C', 4, 1) /* PTC_4 */ +#define LPSPI1_SIN_PTC4 KINETIS_MUX('C', 4, 2) /* PTC_4 */ +#define CAN0_TX_PTC4 KINETIS_MUX('C', 4, 3) /* PTC_4 */ +#define LPI2C1_SCL_PTC4 KINETIS_MUX('C', 4, 4) /* PTC_4 */ +#define TPM2_CH0_PTC4 KINETIS_MUX('C', 4, 6) /* PTC_4 */ +#define FLEXIO0_D20_PTC4 KINETIS_MUX('C', 4, 9) /* PTC_4 */ +#define PTC5 KINETIS_MUX('C', 5, 1) /* PTC_5 */ +#define LPSPI1_PCS0_PTC5 KINETIS_MUX('C', 5, 2) /* PTC_5 */ +#define CAN0_RX_PTC5 KINETIS_MUX('C', 5, 3) /* PTC_5 */ +#define LPI2C1_SDA_PTC5 KINETIS_MUX('C', 5, 4) /* PTC_5 */ +#define TPM1_CH4_PTC5 KINETIS_MUX('C', 5, 5) /* PTC_5 */ +#define TPM2_CH1_PTC5 KINETIS_MUX('C', 5, 6) /* PTC_5 */ +#define FLEXIO0_D21_PTC5 KINETIS_MUX('C', 5, 9) /* PTC_5 */ +#define ADC0_A8_PTC6 KINETIS_MUX('C', 6, 0) /* PTC_6 */ +#define PTC6 KINETIS_MUX('C', 6, 1) /* PTC_6 */ +#define WUU0_P11_PTC6 KINETIS_MUX('C', 6, 1) /* PTC_6 */ +#define LPSPI1_PCS1_PTC6 KINETIS_MUX('C', 6, 2) /* PTC_6 */ +#define TPM1_CH5_PTC6 KINETIS_MUX('C', 6, 5) /* PTC_6 */ +#define FLEXIO0_D22_PTC6 KINETIS_MUX('C', 6, 9) /* PTC_6 */ +#define NMI_b_PTC7 KINETIS_MUX('C', 7, 1) /* PTC_7 */ +#define WUU0_P12_PTC7 KINETIS_MUX('C', 7, 1) /* PTC_7 */ +#define RF_NOT_ALLOWED_PTC7 KINETIS_MUX('C', 7, 1) /* PTC_7 */ +#define PTC7 KINETIS_MUX('C', 7, 1) /* PTC_7 */ +#define TRGMUX0_IN3_PTC7 KINETIS_MUX('C', 7, 2) /* PTC_7 */ +#define TRGMUX0_OUT3_PTC7 KINETIS_MUX('C', 7, 3) /* PTC_7 */ +#define SFA0_CLK_PTC7 KINETIS_MUX('C', 7, 4) /* PTC_7 */ +#define TPM1_CLKIN_PTC7 KINETIS_MUX('C', 7, 5) /* PTC_7 */ +#define TPM2_CLKIN_PTC7 KINETIS_MUX('C', 7, 6) /* PTC_7 */ +#define CLKOUT_PTC7 KINETIS_MUX('C', 7, 7) /* PTC_7 */ +#define FLEXIO0_D23_PTC7 KINETIS_MUX('C', 7, 9) /* PTC_7 */ +#define ADC0_A5_PTD0 KINETIS_MUX('D', 0, 0) /* PTD_0 */ +#define PTD0 KINETIS_MUX('D', 0, 1) /* PTD_0 */ +#define RESET_b_PTD0 KINETIS_MUX('D', 0, 3) /* PTD_0 */ +#define ADC0_B5_PTD1 KINETIS_MUX('D', 1, 0) /* PTD_1 */ +#define PTD1 KINETIS_MUX('D', 1, 1) /* PTD_1 */ +#define SPC0_LPREQ_PTD1 KINETIS_MUX('D', 1, 2) /* PTD_1 */ +#define NMI_b_PTD1 KINETIS_MUX('D', 1, 3) /* PTD_1 */ +#define RF_GPO_4_PTD1 KINETIS_MUX('D', 1, 4) /* PTD_1 */ +#define ADC0_A6_PTD2 KINETIS_MUX('D', 2, 0) /* PTD_2 */ +#define PTD2 KINETIS_MUX('D', 2, 1) /* PTD_2 */ +#define LPTMR0_ALT3_PTD2 KINETIS_MUX('D', 2, 2) /* PTD_2 */ +#define TAMPER0_PTD2 KINETIS_MUX('D', 2, 3) /* PTD_2 */ +#define RF_GPO_5_PTD2 KINETIS_MUX('D', 2, 4) /* PTD_2 */ +#define ADC0_B6_PTD3 KINETIS_MUX('D', 3, 0) /* PTD_3 */ +#define PTD3 KINETIS_MUX('D', 3, 1) /* PTD_3 */ +#define LPTMR1_ALT3_PTD3 KINETIS_MUX('D', 3, 2) /* PTD_3 */ +#define TAMPER1_PTD3 KINETIS_MUX('D', 3, 3) /* PTD_3 */ +#define RF_GPO_6_PTD3 KINETIS_MUX('D', 3, 4) /* PTD_3 */ +#define TRGMUX0_IN2_PTD3 KINETIS_MUX('D', 3, 6) /* PTD_3 */ +#define XTAL32K_PTD4 KINETIS_MUX('D', 4, 0) /* PTD_4 */ +#define PTD4 KINETIS_MUX('D', 4, 1) /* PTD_4 */ +#define LPTMR0_ALT2_PTD4 KINETIS_MUX('D', 4, 2) /* PTD_4 */ +#define TAMPER2_PTD4 KINETIS_MUX('D', 4, 3) /* PTD_4 */ +#define EXTAL32K_PTD5 KINETIS_MUX('D', 5, 0) /* PTD_5 */ +#define PTD5 KINETIS_MUX('D', 5, 1) /* PTD_5 */ +#define LPTMR1_ALT2_PTD5 KINETIS_MUX('D', 5, 2) /* PTD_5 */ #endif diff --git a/mcux/mcux-sdk/boards/kw45b41zevk/board.c b/mcux/mcux-sdk/boards/kw45b41zevk/board.c index baf1364d7..d6db997c7 100644 --- a/mcux/mcux-sdk/boards/kw45b41zevk/board.c +++ b/mcux/mcux-sdk/boards/kw45b41zevk/board.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: BSD-3-Clause /* * Copyright 2024 NXP * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause */ #include @@ -20,9 +19,9 @@ /* Initialize debug console. */ void BOARD_InitDebugConsole(void) { - uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ; + uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ; - CLOCK_SetIpSrc(kCLOCK_Lpuart1, kCLOCK_IpSrcFro6M); + CLOCK_SetIpSrc(kCLOCK_Lpuart1, kCLOCK_IpSrcFro6M); - DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq); + DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq); } diff --git a/mcux/mcux-sdk/boards/kw45b41zevk/board.h b/mcux/mcux-sdk/boards/kw45b41zevk/board.h index 0b533d6ab..1be65b088 100644 --- a/mcux/mcux-sdk/boards/kw45b41zevk/board.h +++ b/mcux/mcux-sdk/boards/kw45b41zevk/board.h @@ -1,8 +1,6 @@ -/* +/* SPDX-License-Identifier: BSD-3-Clause * Copyright 2024 NXP * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause */ #ifndef _BOARD_H_ @@ -20,7 +18,7 @@ /* The UART to use for debug messages. */ #define BOARD_USE_LPUART #define BOARD_DEBUG_UART_TYPE kSerialPort_Uart -#define BOARD_DEBUG_UART_BASEADDR (uint32_t) LPUART1 +#define BOARD_DEBUG_UART_BASEADDR ((uint32_t) LPUART1) #define BOARD_DEBUG_UART_INSTANCE 1U #define BOARD_DEBUG_UART_CLK_FREQ (CLOCK_GetFreq(kCLOCK_ScgSircClk)) @@ -65,23 +63,23 @@ #define BOARD_LED3_GPIO_PIN 21U #endif -#define LED1_INIT(output) \ - GPIO_PinWrite(BOARD_LED1_GPIO, BOARD_LED1_GPIO_PIN, output); \ - BOARD_LED1_GPIO->PDDR |= (1U << BOARD_LED1_GPIO_PIN) /*!< Enable target LED1 */ +#define LED1_INIT(output) \ + GPIO_PinWrite(BOARD_LED1_GPIO, BOARD_LED1_GPIO_PIN, output); \ + BOARD_LED1_GPIO->PDDR |= (1U << BOARD_LED1_GPIO_PIN) /*!< Enable target LED1 */ #define LED1_ON() GPIO_PortSet(BOARD_LED1_GPIO, 1U << BOARD_LED1_GPIO_PIN) /*!< Turn on target LED1 */ #define LED1_OFF() GPIO_PortClear(BOARD_LED1_GPIO, 1U << BOARD_LED1_GPIO_PIN) /*!< Turn off target LED1 */ #define LED1_TOGGLE() GPIO_PortToggle(BOARD_LED1_GPIO, 1U << BOARD_LED1_GPIO_PIN) /*!< Toggle on target LED1 */ -#define LED2_INIT(output) \ - GPIO_PinWrite(BOARD_LED2_GPIO, BOARD_LED2_GPIO_PIN, output); \ - BOARD_LED2_GPIO->PDDR |= (1U << BOARD_LED2_GPIO_PIN) /*!< Enable target LED2 */ +#define LED2_INIT(output) \ + GPIO_PinWrite(BOARD_LED2_GPIO, BOARD_LED2_GPIO_PIN, output); \ + BOARD_LED2_GPIO->PDDR |= (1U << BOARD_LED2_GPIO_PIN) /*!< Enable target LED2 */ #define LED2_ON() GPIO_PortSet(BOARD_LED2_GPIO, 1U << BOARD_LED2_GPIO_PIN) /*!< Turn on target LED2 */ #define LED2_OFF() GPIO_PortClear(BOARD_LED2_GPIO, 1U << BOARD_LED2_GPIO_PIN) /*!< Turn off target LED2 */ #define LED2_TOGGLE() GPIO_PortToggle(BOARD_LED2_GPIO, 1U << BOARD_LED2_GPIO_PIN) /*!< Toggle on target LED2 */ -#define LED3_INIT(output) \ - GPIO_PinWrite(BOARD_LED3_GPIO, BOARD_LED3_GPIO_PIN, output); \ - BOARD_LED3_GPIO->PDDR |= (1U << BOARD_LED3_GPIO_PIN) /*!< Enable target LED3 */ +#define LED3_INIT(output) \ + GPIO_PinWrite(BOARD_LED3_GPIO, BOARD_LED3_GPIO_PIN, output); \ + BOARD_LED3_GPIO->PDDR |= (1U << BOARD_LED3_GPIO_PIN) /*!< Enable target LED3 */ #define LED3_ON() GPIO_PortSet(BOARD_LED3_GPIO, 1U << BOARD_LED3_GPIO_PIN) /*!< Turn on target LED3 */ #define LED3_OFF() GPIO_PortClear(BOARD_LED3_GPIO, 1U << BOARD_LED3_GPIO_PIN) /*!< Turn off target LED3 */ #define LED3_TOGGLE() GPIO_PortToggle(BOARD_LED3_GPIO, 1U << BOARD_LED3_GPIO_PIN) /*!< Toggle on target LED3 */ diff --git a/mcux/mcux-sdk/boards/kw45b41zevk/clock_config.c b/mcux/mcux-sdk/boards/kw45b41zevk/clock_config.c index 48747c64e..a0af0ec41 100644 --- a/mcux/mcux-sdk/boards/kw45b41zevk/clock_config.c +++ b/mcux/mcux-sdk/boards/kw45b41zevk/clock_config.c @@ -1,9 +1,7 @@ +// SPDX-License-Identifier: BSD-3-Clause /* * Copyright 2024 NXP * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * */ /*********************************************************************************************************************** @@ -27,12 +25,12 @@ /* clang-format off */ /* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!GlobalInfo -product: Clocks v11.0 -processor: KW45B41Z83xxxA -package_id: KW45B41Z83AFTA -mcu_data: ksdk2_0 -processor_version: 14.0.0 + * !!GlobalInfo + * product: Clocks v11.0 + * processor: KW45B41Z83xxxA + * package_id: KW45B41Z83AFTA + * mcu_data: ksdk2_0 + * processor_version: 14.0.0 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ /* clang-format on */ @@ -60,7 +58,7 @@ processor_version: 14.0.0 *END**************************************************************************/ static void CLOCK_CONFIG_SetScgOutSel(clock_clkout_src_t setting) { - SCG0->CLKOUTCNFG = SCG_CLKOUTCNFG_CLKOUTSEL(setting); + SCG0->CLKOUTCNFG = SCG_CLKOUTCNFG_CLKOUTSEL(setting); } /*FUNCTION********************************************************************** @@ -69,28 +67,27 @@ static void CLOCK_CONFIG_SetScgOutSel(clock_clkout_src_t setting) * Description : This function is used to safely configure FIRC clock. * In default out of reset, the CPU is clocked from FIRC. * Before setting FIRC, change to use SIRC as system clock, - * then configure FIRC. + * then configure FIRC. * Param fircConfig : FIRC configuration. * *END**************************************************************************/ static void CLOCK_CONFIG_FircSafeConfig(const scg_firc_config_t *fircConfig) { - scg_sys_clk_config_t curConfig; - scg_sys_clk_config_t sysClkSafeConfigSource = { - .divSlow = (uint32_t)kSCG_SysClkDivBy4, /* Slow clock divider */ - .divCore = (uint32_t)kSCG_SysClkDivBy1, /* Core clock divider */ - .src = (uint32_t)kSCG_SysClkSrcSirc, /* System clock source */ - }; - /* Change to use SIRC as system clock source to prepare to change FIRCCFG register */ - CLOCK_SetRunModeSysClkConfig(&sysClkSafeConfigSource); - /* Wait for clock source switch finished */ - do - { - CLOCK_GetCurSysClkConfig(&curConfig); - } while (curConfig.src != sysClkSafeConfigSource.src); + scg_sys_clk_config_t curConfig; + scg_sys_clk_config_t sysClkSafeConfigSource = { + .divSlow = (uint32_t)kSCG_SysClkDivBy4, /* Slow clock divider */ + .divCore = (uint32_t)kSCG_SysClkDivBy1, /* Core clock divider */ + .src = (uint32_t)kSCG_SysClkSrcSirc, /* System clock source */ + }; + /* Change to use SIRC as system clock source to prepare to change FIRCCFG register */ + CLOCK_SetRunModeSysClkConfig(&sysClkSafeConfigSource); + /* Wait for clock source switch finished */ + do { + CLOCK_GetCurSysClkConfig(&curConfig); + } while (curConfig.src != sysClkSafeConfigSource.src); - /* Init Firc */ - (void)CLOCK_InitFirc(fircConfig); + /* Init Firc */ + (void)CLOCK_InitFirc(fircConfig); } /******************************************************************************* @@ -98,7 +95,7 @@ static void CLOCK_CONFIG_FircSafeConfig(const scg_firc_config_t *fircConfig) ******************************************************************************/ void BOARD_InitBootClocks(void) { - BOARD_BootClockRUN(); + BOARD_BootClockRUN(); } /******************************************************************************* @@ -106,162 +103,158 @@ void BOARD_InitBootClocks(void) ******************************************************************************/ /* clang-format off */ /* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockRUN -called_from_default_init: true -outputs: -- {id: BUS_CLK.outFreq, value: 96 MHz} -- {id: CPU_CLK.outFreq, value: 96 MHz} -- {id: FIRC_CLK.outFreq, value: 96 MHz} -- {id: FRO16K_CLK.outFreq, value: 16 kHz} -- {id: RADIO_FRO192M_CLK.outFreq, value: 32 MHz} -- {id: RADIO_FRO192M_FRODIV_CLK.outFreq, value: 16 MHz} -- {id: ROSC_CLK.outFreq, value: 32.768 kHz} -- {id: SCG.FIRC_EXT_REF_TRIM_CLK.outFreq, value: 1 MHz} -- {id: SCGCLKOUT_CLK.outFreq, value: 24 MHz} -- {id: SIRC_CLK.outFreq, value: 6 MHz} -- {id: SLOW_CLK.outFreq, value: 24 MHz} -- {id: SOSC_CLK.outFreq, value: 32 MHz} -- {id: System_clock.outFreq, value: 96 MHz} -settings: -- {id: VDDCore, value: voltage_1v1} -- {id: CCM32K.CCM32K_32K_SEL.sel, value: CCM32K.OSC_32K} -- {id: CCM32K_FRO32K_CTRL_FRO_EN_CFG, value: Disabled} -- {id: CCM32K_OSC32K_CTRL_CAP_SEL_EN_CFG, value: Enabled} -- {id: CCM32K_OSC32K_CTRL_EXTAL_CAP_SEL_CFG, value: 8PF} -- {id: CCM32K_OSC32K_CTRL_OSC_EN_CFG, value: Enabled} -- {id: CCM32K_OSC32K_CTRL_XTAL_CAP_SEL_CFG, value: 8PF} -- {id: SCG.DIVCORE.scale, value: '1', locked: true} -- {id: SCG.DIVSLOW.scale, value: '4', locked: true} -- {id: SCG.FIRC_TRIMDIV.scale, value: '32', locked: true} -- {id: SCG_FIRCCSR_TRIM_CFG, value: Autotrimming} -- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled} -sources: -- {id: CCM32K.OSC_32K.outFreq, value: 32.768 kHz, enabled: true} -- {id: RADIO.RADIO_FRO192M.outFreq, value: 32 MHz} -- {id: SCG.FIRC.outFreq, value: 96 MHz} -- {id: SCG.SOSC.outFreq, value: 32 MHz, enabled: true} + * !!Configuration + * name: BOARD_BootClockRUN + * called_from_default_init: true + * outputs: + * - {id: BUS_CLK.outFreq, value: 96 MHz} + * - {id: CPU_CLK.outFreq, value: 96 MHz} + * - {id: FIRC_CLK.outFreq, value: 96 MHz} + * - {id: FRO16K_CLK.outFreq, value: 16 kHz} + * - {id: RADIO_FRO192M_CLK.outFreq, value: 32 MHz} + * - {id: RADIO_FRO192M_FRODIV_CLK.outFreq, value: 16 MHz} + * - {id: ROSC_CLK.outFreq, value: 32.768 kHz} + * - {id: SCG.FIRC_EXT_REF_TRIM_CLK.outFreq, value: 1 MHz} + * - {id: SCGCLKOUT_CLK.outFreq, value: 24 MHz} + * - {id: SIRC_CLK.outFreq, value: 6 MHz} + * - {id: SLOW_CLK.outFreq, value: 24 MHz} + * - {id: SOSC_CLK.outFreq, value: 32 MHz} + * - {id: System_clock.outFreq, value: 96 MHz} + * settings: + * - {id: VDDCore, value: voltage_1v1} + * - {id: CCM32K.CCM32K_32K_SEL.sel, value: CCM32K.OSC_32K} + * - {id: CCM32K_FRO32K_CTRL_FRO_EN_CFG, value: Disabled} + * - {id: CCM32K_OSC32K_CTRL_CAP_SEL_EN_CFG, value: Enabled} + * - {id: CCM32K_OSC32K_CTRL_EXTAL_CAP_SEL_CFG, value: 8PF} + * - {id: CCM32K_OSC32K_CTRL_OSC_EN_CFG, value: Enabled} + * - {id: CCM32K_OSC32K_CTRL_XTAL_CAP_SEL_CFG, value: 8PF} + * - {id: SCG.DIVCORE.scale, value: '1', locked: true} + * - {id: SCG.DIVSLOW.scale, value: '4', locked: true} + * - {id: SCG.FIRC_TRIMDIV.scale, value: '32', locked: true} + * - {id: SCG_FIRCCSR_TRIM_CFG, value: Autotrimming} + * - {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled} + * sources: + * - {id: CCM32K.OSC_32K.outFreq, value: 32.768 kHz, enabled: true} + * - {id: RADIO.RADIO_FRO192M.outFreq, value: 32 MHz} + * - {id: SCG.FIRC.outFreq, value: 96 MHz} + * - {id: SCG.SOSC.outFreq, value: 32 MHz, enabled: true} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ /* clang-format on */ /******************************************************************************* * Variables for BOARD_BootClockRUN configuration ******************************************************************************/ -static const scg_firc_trim_config_t FircTrimConfig_BOARD_BootClockRUN = -{ - .trimMode = kSCG_FircTrimUpdate, /* FIRC trim is enabled and trim value update is enabled */ - .trimSrc = kSCG_FircTrimSrcSysOsc, /* Trim source is System OSC */ - .trimDiv = 31U, /* Divided by 32 */ - .trimCoar = 0U, /* Trim value, see Reference Manual for more information */ - .trimFine = 0U, /* Trim value, see Reference Manual for more information */ +static const scg_firc_trim_config_t FircTrimConfig_BOARD_BootClockRUN = { + + .trimMode = kSCG_FircTrimUpdate, /* FIRC trim is enabled and trim value update is enabled */ + .trimSrc = kSCG_FircTrimSrcSysOsc, /* Trim source is System OSC */ + .trimDiv = 31U, /* Divided by 32 */ + .trimCoar = 0U, /* Trim value, see Reference Manual for more information */ + .trimFine = 0U, /* Trim value, see Reference Manual for more information */ }; -const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockRUN = -{ - .divSlow = (uint32_t)kSCG_SysClkDivBy4, /* Slow Clock Divider: divided by 4 */ - .divBus = (uint32_t)kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */ - .divCore = (uint32_t)kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */ - .src = (uint32_t)kSCG_SysClkSrcFirc, /* Fast IRC is selected as System Clock Source */ +const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockRUN = { + + .divSlow = (uint32_t)kSCG_SysClkDivBy4, /* Slow Clock Divider: divided by 4 */ + .divBus = (uint32_t)kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */ + .divCore = (uint32_t)kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */ + .src = (uint32_t)kSCG_SysClkSrcFirc, /* Fast IRC is selected as System Clock Source */ }; -const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockRUN = -{ - .freq = 32000000U, /* System Oscillator frequency: 32000000Hz */ - .monitorMode = kSCG_SysOscMonitorDisable, /* System OSC Clock Monitor is disabled */ - .enableMode = kSCG_SoscEnable, /* System OSC Enable */ +const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockRUN = { + .freq = 32000000U, /* System Oscillator frequency: 32000000Hz */ + .monitorMode = kSCG_SysOscMonitorDisable, /* System OSC Clock Monitor is disabled */ + .enableMode = kSCG_SoscEnable, /* System OSC Enable */ }; -const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockRUN = -{ - .enableMode = kSCG_SircDisableInSleep, /* Slow IRC is disabled in sleep modes */ +const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockRUN = { + .enableMode = kSCG_SircDisableInSleep, /* Slow IRC is disabled in sleep modes */ }; -const scg_firc_config_t g_scgFircConfig_BOARD_BootClockRUN = -{ - .enableMode = kSCG_FircEnable, /* Fast IRC is enabled */ - .range = kSCG_FircRange96M, /* 96 Mhz FIRC clock selected */ - .trimConfig = &FircTrimConfig_BOARD_BootClockRUN, +const scg_firc_config_t g_scgFircConfig_BOARD_BootClockRUN = { + .enableMode = kSCG_FircEnable, /* Fast IRC is enabled */ + .range = kSCG_FircRange96M, /* 96 Mhz FIRC clock selected */ + .trimConfig = &FircTrimConfig_BOARD_BootClockRUN, }; -static const ccm32k_osc_config_t g_ccm32kOscConfig_BOARD_BootClockRUN = -{ - .coarseAdjustment = kCCM32K_OscCoarseAdjustmentRange0,/* ESR_Range0 */ - .enableInternalCapBank = true, /* Internal capacitance bank is enabled */ - .xtalCap = kCCM32K_OscXtal8pFCap, /* 8 pF */ - .extalCap = kCCM32K_OscExtal8pFCap, /* 8 pF */ +static const ccm32k_osc_config_t g_ccm32kOscConfig_BOARD_BootClockRUN = { + .coarseAdjustment = kCCM32K_OscCoarseAdjustmentRange0,/* ESR_Range0 */ + .enableInternalCapBank = true, /* Internal capacitance bank is enabled */ + .xtalCap = kCCM32K_OscXtal8pFCap, /* 8 pF */ + .extalCap = kCCM32K_OscExtal8pFCap, /* 8 pF */ }; /******************************************************************************* * Code for BOARD_BootClockRUN configuration ******************************************************************************/ void BOARD_BootClockRUN(void) { - uint32_t coreFreq; - scg_sys_clk_config_t curConfig; - spc_active_mode_core_ldo_option_t ldoOption; + uint32_t coreFreq; + scg_sys_clk_config_t curConfig; + spc_active_mode_core_ldo_option_t ldoOption; + + /* Unlock FIRC, SIRC, ROSC and SOSC control status registers */ + CLOCK_UnlockFircControlStatusReg(); + CLOCK_UnlockSircControlStatusReg(); + CLOCK_UnlockRoscControlStatusReg(); + CLOCK_UnlockSysOscControlStatusReg(); + + /* Get the CPU Core frequency */ + coreFreq = CLOCK_GetSysClkFreq(kSCG_SysClkCore); + + if (coreFreq <= BOARD_BOOTCLOCKRUN_CORE_CLOCK) { + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + SPC_SetSRAMOperateVoltage(SPC0, kSPC_SRAM_OperatVoltage1P1V); + } - /* Unlock FIRC, SIRC, ROSC and SOSC control status registers */ - CLOCK_UnlockFircControlStatusReg(); - CLOCK_UnlockSircControlStatusReg(); - CLOCK_UnlockRoscControlStatusReg(); - CLOCK_UnlockSysOscControlStatusReg(); + /* Config 32k Crystal Oscillator */ + CCM32K_Set32kOscConfig(CCM32K, kCCM32K_Enable32kHzCrystalOsc, &g_ccm32kOscConfig_BOARD_BootClockRUN); + /* Monitor is disabled */ + CLOCK_SetRoscMonitorMode(kSCG_RoscMonitorDisable); - /* Get the CPU Core frequency */ - coreFreq = CLOCK_GetSysClkFreq(kSCG_SysClkCore); + /* Wait for the 32kHz crystal oscillator to be stable */ + while ((CCM32K_GetStatusFlag(CCM32K) & CCM32K_STATUS_OSC32K_RDY_MASK) == 0UL) + ; - if (coreFreq <= BOARD_BOOTCLOCKRUN_CORE_CLOCK) { - /* Set the LDO_CORE VDD regulator level */ - ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; - ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; - (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); - /* Configure Flash to support different voltage level and frequency */ - FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U)); - /* Specifies the operating voltage for the SRAM's read/write timing margin */ - SPC_SetSRAMOperateVoltage(SPC0, kSPC_SRAM_OperatVoltage1P1V); - } + /* OSC32K clock output is selected as clock source */ + CCM32K_SelectClockSource(CCM32K, kCCM32K_ClockSourceSelectOsc32k); + /* Disable the FRO32K clock */ + CCM32K_Enable32kFro(CCM32K, false); - /* Config 32k Crystal Oscillator */ - CCM32K_Set32kOscConfig(CCM32K, kCCM32K_Enable32kHzCrystalOsc, &g_ccm32kOscConfig_BOARD_BootClockRUN); - /* Monitor is disabled */ - CLOCK_SetRoscMonitorMode(kSCG_RoscMonitorDisable); - /* Wait for the 32kHz crystal oscillator to be stable */ - while ((CCM32K_GetStatusFlag(CCM32K) & CCM32K_STATUS_OSC32K_RDY_MASK) == 0UL) - { - } - /* OSC32K clock output is selected as clock source */ - CCM32K_SelectClockSource(CCM32K, kCCM32K_ClockSourceSelectOsc32k); - /* Disable the FRO32K clock */ - CCM32K_Enable32kFro(CCM32K, false); - /* Wait for RTC Oscillator to be Valid */ - while (!CLOCK_IsRoscValid()) - { - } + /* Wait for RTC Oscillator to be Valid */ + while (!CLOCK_IsRoscValid()) + ; - CLOCK_SetXtal32Freq(BOARD_BOOTCLOCKRUN_ROSC_CLOCK); + CLOCK_SetXtal32Freq(BOARD_BOOTCLOCKRUN_ROSC_CLOCK); - /* Init FIRC */ - CLOCK_CONFIG_FircSafeConfig(&g_scgFircConfig_BOARD_BootClockRUN); - /* Set SCG to FIRC mode */ - CLOCK_SetRunModeSysClkConfig(&g_sysClkConfig_BOARD_BootClockRUN); - /* Wait for clock source switch finished */ - do - { - CLOCK_GetCurSysClkConfig(&curConfig); - } while (curConfig.src != g_sysClkConfig_BOARD_BootClockRUN.src); - /* Initializes SOSC according to board configuration */ - (void)CLOCK_InitSysOsc(&g_scgSysOscConfig_BOARD_BootClockRUN); - /* Set the XTAL0 frequency based on board settings */ - CLOCK_SetXtal0Freq(g_scgSysOscConfig_BOARD_BootClockRUN.freq); - /* Init SIRC */ - (void)CLOCK_InitSirc(&g_scgSircConfig_BOARD_BootClockRUN); - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + /* Init FIRC */ + CLOCK_CONFIG_FircSafeConfig(&g_scgFircConfig_BOARD_BootClockRUN); + /* Set SCG to FIRC mode */ + CLOCK_SetRunModeSysClkConfig(&g_sysClkConfig_BOARD_BootClockRUN); + /* Wait for clock source switch finished */ + do { + CLOCK_GetCurSysClkConfig(&curConfig); + } while (curConfig.src != g_sysClkConfig_BOARD_BootClockRUN.src); + /* Initializes SOSC according to board configuration */ + (void)CLOCK_InitSysOsc(&g_scgSysOscConfig_BOARD_BootClockRUN); + /* Set the XTAL0 frequency based on board settings */ + CLOCK_SetXtal0Freq(g_scgSysOscConfig_BOARD_BootClockRUN.freq); + /* Init SIRC */ + (void)CLOCK_InitSirc(&g_scgSircConfig_BOARD_BootClockRUN); + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; - if (coreFreq > BOARD_BOOTCLOCKRUN_CORE_CLOCK) { - /* Configure Flash to support different voltage level and frequency */ - FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U)); - /* Specifies the operating voltage for the SRAM's read/write timing margin */ - SPC_SetSRAMOperateVoltage(SPC0, kSPC_SRAM_OperatVoltage1P1V); - /* Set the LDO_CORE VDD regulator level */ - ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; - ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; - (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); - } + if (coreFreq > BOARD_BOOTCLOCKRUN_CORE_CLOCK) { + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + SPC_SetSRAMOperateVoltage(SPC0, kSPC_SRAM_OperatVoltage1P1V); + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + } - /* Set SCG CLKOUT selection. */ - CLOCK_CONFIG_SetScgOutSel(kClockClkoutSelScgSlow); + /* Set SCG CLKOUT selection. */ + CLOCK_CONFIG_SetScgOutSel(kClockClkoutSelScgSlow); } diff --git a/mcux/mcux-sdk/boards/kw45b41zevk/clock_config.h b/mcux/mcux-sdk/boards/kw45b41zevk/clock_config.h index f5fbaf929..7b9928ba5 100644 --- a/mcux/mcux-sdk/boards/kw45b41zevk/clock_config.h +++ b/mcux/mcux-sdk/boards/kw45b41zevk/clock_config.h @@ -1,9 +1,6 @@ -/* +/* SPDX-License-Identifier: BSD-3-Clause * Copyright 2024 NXP * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * */ /*********************************************************************************************************************** diff --git a/mcux/mcux-sdk/devices/KW45B41Z83/KW45B41Z83.h b/mcux/mcux-sdk/devices/KW45B41Z83/KW45B41Z83.h index ac86748ba..4a4f57d66 100644 --- a/mcux/mcux-sdk/devices/KW45B41Z83/KW45B41Z83.h +++ b/mcux/mcux-sdk/devices/KW45B41Z83/KW45B41Z83.h @@ -211,8 +211,7 @@ typedef enum IRQn { * Defines the enumeration for the DMA hardware request collections. */ -typedef enum _dma_request_source -{ +typedef enum _dma_request_source { kDmaRequestDisabled = 0U, /**< Disabled */ kDmaRequestWUU0 = 1U, /**< WUU0 Wake up event */ kDmaRequestELE = 2U, /**< EdgeLocK enclave Data request */ @@ -288,8 +287,7 @@ typedef enum _dma_request_source * Defines the enumeration for the TRDC master resource collections. */ -typedef enum _trdc_master -{ +typedef enum _trdc_master { kTRDC_MasterCM33 = 0U, /**< CM33 */ kTRDC_MasterDMA3 = 1U, /**< DMA3 */ kTRDC_MasterDataSteamBuffer = 2U, /**< Data stream buffer */ @@ -303,8 +301,7 @@ typedef enum _trdc_master * * Defines the enumeration for the TRDC MBC0 slave resource collections. */ -typedef enum _trdc_mbc0_slave -{ +typedef enum _trdc_mbc0_slave { kTRDC_SlaveFlash = 0U, /**< Flash - 1MB */ kTRDC_SlaveFlashIFR0 = 1U, /**< Flash IFR0 - 32 KB */ kTRDC_SlaveFlashIFR1 = 2U, /**< Flash IFR1 - 8 KB */ @@ -316,8 +313,7 @@ typedef enum _trdc_mbc0_slave * * Defines the enumeration for the TRDC MBC1 slave resource collections. */ -typedef enum _trdc_mbc1_slave -{ +typedef enum _trdc_mbc1_slave { kTRDC_SlaveCTCM0_1 = 0U, /**< CTCM0,1 - 16 KB (with ECC) */ kTRDC_SlaveSTCM0_1_2 = 1U, /**< STCM0,1,2 - 16,16,32 KB (with ECC) */ kTRDC_SlaveSTCM3_4 = 2U, /**< STCM3,4 - 32,8 KB (with ECC) */ @@ -329,8 +325,7 @@ typedef enum _trdc_mbc1_slave * * Defines the enumeration for the TRDC MBC2 slave resource collections. */ -typedef enum _trdc_mbc2_slave -{ +typedef enum _trdc_mbc2_slave { kTRDC_SlavePBRIDGE2 = 0U, /**< PBRIDGE2 */ kTRDC_SlaveRadioPridge = 1U, /**< Radio Pridge in Fast Peripheral 1 */ kTRDC_SlaveNBU = 2U, /**< NBU part in Fast Peripheral 1 */ @@ -349,8 +344,7 @@ typedef enum _trdc_mbc2_slave * * Defines the enumeration for the TRGMUX source collections. */ -typedef enum _trgmux_source -{ +typedef enum _trgmux_source { kTRGMUX_SourceDisabled = 0U, /**< Trigger function is disabled */ kTRGMUX_SourceAlwaysHigh = 1U, /**< Trigger function is always high */ kTRGMUX_SourceTrgmux0Input0 = 2U, /**< TRGMUX0 Input 0 is selected */ @@ -428,8 +422,7 @@ typedef enum _trgmux_source * * Defines the enumeration for the TRGMUX device collections. */ -typedef enum _trgmux_device -{ +typedef enum _trgmux_device { kTRGMUX_Trgmux0Output0 = 0U, /**< TRGMUX_OUT0 device trigger input */ kTRGMUX_Trgmux0Lpit0 = 1U, /**< LPIT0 device trigger input */ kTRGMUX_Trgmux0Tpm0 = 2U, /**< TPM0 device trigger input */ @@ -478,7 +471,7 @@ typedef enum _trgmux_device #elif defined(__GNUC__) /* anonymous unions are enabled by default */ #elif defined(__IAR_SYSTEMS_ICC__) - #pragma language=extended + #pragma language = extended #else #error Not supported compiler type #endif @@ -9257,7 +9250,7 @@ typedef struct { }; union { /* offset: 0x8 */ struct { /* offset: 0x8 */ - uint8_t RESERVED_0[3]; + uint8_t RESERVED_0[3]; __IO uint8_t CTRLHU; /**< CRC_CTRLHU register, offset: 0xB */ } CTRL_ACCESS8BIT; __IO uint32_t CTRL; /**< CRC Control register, offset: 0x8 */ @@ -9574,7 +9567,7 @@ typedef struct { __IO uint32_t CH_SBR; /**< Channel System Bus, array offset: 0x100C, array step: 0x1000 */ __IO uint32_t CH_PRI; /**< Channel Priority, array offset: 0x1010, array step: 0x1000 */ __IO uint32_t CH_MUX; /**< Channel Multiplexor Configuration, array offset: 0x1014, array step: 0x1000 */ - uint8_t RESERVED_0[8]; + uint8_t RESERVED_0[8]; __IO uint32_t TCD_SADDR; /**< TCD Source Address, array offset: 0x1020, array step: 0x1000 */ __IO uint16_t TCD_SOFF; /**< TCD Signed Source Address Offset, array offset: 0x1024, array step: 0x1000 */ __IO uint16_t TCD_ATTR; /**< TCD Transfer Attributes, array offset: 0x1026, array step: 0x1000 */ @@ -9595,7 +9588,7 @@ typedef struct { __IO uint16_t TCD_BITER_ELINKNO; /**< TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled), array offset: 0x103E, array step: 0x1000 */ __IO uint16_t TCD_BITER_ELINKYES; /**< TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled), array offset: 0x103E, array step: 0x1000 */ }; - uint8_t RESERVED_1[4032]; + uint8_t RESERVED_1[4032]; } CH[16]; } DMA_Type; @@ -22434,7 +22427,7 @@ typedef struct { #define LPI2C_MCFGR0_RDMO_SHIFT (9U) /*! RDMO - Receive Data Match Only * 0b0..Received data is stored in the receive FIFO - * 0b1..Received data is discarded unless the the Data Match Flag (MSR[DMF]) is set + * 0b1..Received data is discarded unless the Data Match Flag (MSR[DMF]) is set */ #define LPI2C_MCFGR0_RDMO(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_RDMO_SHIFT)) & LPI2C_MCFGR0_RDMO_MASK) @@ -23436,7 +23429,7 @@ typedef struct { __IO uint32_t TVAL; /**< Timer Value, array offset: 0x20, array step: 0x10 */ __I uint32_t CVAL; /**< Current Timer Value, array offset: 0x24, array step: 0x10 */ __IO uint32_t TCTRL; /**< Timer Control, array offset: 0x28, array step: 0x10 */ - uint8_t RESERVED_0[4]; + uint8_t RESERVED_0[4]; } CHANNEL[4]; } LPIT_Type; @@ -37686,13 +37679,13 @@ typedef struct { uint8_t RESERVED_0[496]; struct { /* offset: 0x200, array step: 0x100 */ __IO uint32_t PMCR; /**< Performance Monitor Control Register, array offset: 0x200, array step: 0x100 */ - uint8_t RESERVED_0[20]; + uint8_t RESERVED_0[20]; struct { /* offset: 0x218, array step: index*0x100, index2*0x8 */ __I uint8_t HI; /**< Performance Monitor Event Counter, array offset: 0x218, array step: index*0x100, index2*0x8 */ - uint8_t RESERVED_0[3]; + uint8_t RESERVED_0[3]; __I uint32_t LO; /**< Performance Monitor Event Counter, array offset: 0x21C, array step: index*0x100, index2*0x8 */ } PMECTR[3]; - uint8_t RESERVED_1[208]; + uint8_t RESERVED_1[208]; } PMCR[2]; } SYSPM_Type; @@ -38651,14 +38644,14 @@ typedef struct { struct { /* offset: 0x400, array step: 0x10 */ __I uint32_t W0; /**< MBC Domain Error Word0 Register, array offset: 0x400, array step: 0x10 */ __I uint32_t W1; /**< MBC Domain Error Word1 Register, array offset: 0x404, array step: 0x10 */ - uint8_t RESERVED_0[4]; + uint8_t RESERVED_0[4]; __O uint32_t W3; /**< MBC Domain Error Word3 Register, array offset: 0x40C, array step: 0x10 */ } MBC_DERR[3]; uint8_t RESERVED_7[80]; struct { /* offset: 0x480, array step: 0x10 */ __I uint32_t W0; /**< MRC Domain Error Word0 Register, array offset: 0x480, array step: 0x10 */ __I uint32_t W1; /**< MRC Domain Error Word1 Register, array offset: 0x484, array step: 0x10 */ - uint8_t RESERVED_0[4]; + uint8_t RESERVED_0[4]; __O uint32_t W3; /**< MRC Domain Error Word3 Register, array offset: 0x48C, array step: 0x10 */ } MRC_DERR[1]; uint8_t RESERVED_8[880]; @@ -38666,7 +38659,7 @@ typedef struct { uint8_t RESERVED_9[28]; struct { /* offset: 0x820, array step: 0x20 */ __IO uint32_t MDA_W0_x_DFMT1; /**< DAC Master Domain Assignment Register, array offset: 0x820, array step: 0x20 */ - uint8_t RESERVED_0[28]; + uint8_t RESERVED_0[28]; } MDA_W0_DFMT1[3]; uint8_t RESERVED_10[1920]; struct { /* offset: 0x1000, array step: 0x1000 */ @@ -38677,72 +38670,72 @@ typedef struct { __O uint32_t MBC_NSE_BLK_CLR_ALL; /**< MBC NonSecure Enable Block Clear All, array offset: 0x101C, array step: 0x1000 */ __IO uint32_t MBC_MEMN_GLBAC[8]; /**< MBC Global Access Control, array offset: 0x1020, array step: index*0x1000, index2*0x4 */ __IO uint32_t MBC_DOM0_MEM0_BLK_CFG_W[10]; /**< MBC Memory Block Configuration Word, array offset: 0x1040, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_0[216]; + uint8_t RESERVED_0[216]; __IO uint32_t MBC_DOM0_MEM0_BLK_NSE_W[3]; /**< MBC Memory Block NonSecure Enable Word, array offset: 0x1140, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_1[52]; + uint8_t RESERVED_1[52]; __IO uint32_t MBC_DOM0_MEM1_BLK_CFG_W[1]; /**< MBC Memory Block Configuration Word, array offset: 0x1180, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_2[28]; + uint8_t RESERVED_2[28]; __IO uint32_t MBC_DOM0_MEM1_BLK_NSE_W[1]; /**< MBC Memory Block NonSecure Enable Word, array offset: 0x11A0, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_3[4]; + uint8_t RESERVED_3[4]; __IO uint32_t MBC_DOM0_MEM2_BLK_CFG_W[2]; /**< MBC Memory Block Configuration Word, array offset: 0x11A8, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_4[24]; + uint8_t RESERVED_4[24]; __IO uint32_t MBC_DOM0_MEM2_BLK_NSE_W[1]; /**< MBC Memory Block NonSecure Enable Word, array offset: 0x11C8, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_5[4]; + uint8_t RESERVED_5[4]; __IO uint32_t MBC_DOM0_MEM3_BLK_CFG_W[2]; /**< MBC Memory Block Configuration Word, array offset: 0x11D0, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_6[24]; + uint8_t RESERVED_6[24]; __IO uint32_t MBC_DOM0_MEM3_BLK_NSE_W[1]; /**< MBC Memory Block NonSecure Enable Word, array offset: 0x11F0, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_7[76]; + uint8_t RESERVED_7[76]; __IO uint32_t MBC_DOM1_MEM0_BLK_CFG_W[10]; /**< MBC Memory Block Configuration Word, array offset: 0x1240, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_8[216]; + uint8_t RESERVED_8[216]; __IO uint32_t MBC_DOM1_MEM0_BLK_NSE_W[3]; /**< MBC Memory Block NonSecure Enable Word, array offset: 0x1340, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_9[52]; + uint8_t RESERVED_9[52]; __IO uint32_t MBC_DOM1_MEM1_BLK_CFG_W[1]; /**< MBC Memory Block Configuration Word, array offset: 0x1380, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_10[28]; + uint8_t RESERVED_10[28]; __IO uint32_t MBC_DOM1_MEM1_BLK_NSE_W[1]; /**< MBC Memory Block NonSecure Enable Word, array offset: 0x13A0, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_11[4]; + uint8_t RESERVED_11[4]; __IO uint32_t MBC_DOM1_MEM2_BLK_CFG_W[2]; /**< MBC Memory Block Configuration Word, array offset: 0x13A8, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_12[24]; + uint8_t RESERVED_12[24]; __IO uint32_t MBC_DOM1_MEM2_BLK_NSE_W[1]; /**< MBC Memory Block NonSecure Enable Word, array offset: 0x13C8, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_13[4]; + uint8_t RESERVED_13[4]; __IO uint32_t MBC_DOM1_MEM3_BLK_CFG_W[2]; /**< MBC Memory Block Configuration Word, array offset: 0x13D0, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_14[24]; + uint8_t RESERVED_14[24]; __IO uint32_t MBC_DOM1_MEM3_BLK_NSE_W[1]; /**< MBC Memory Block NonSecure Enable Word, array offset: 0x13F0, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_15[76]; + uint8_t RESERVED_15[76]; __IO uint32_t MBC_DOM2_MEM0_BLK_CFG_W[10]; /**< MBC Memory Block Configuration Word, array offset: 0x1440, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_16[216]; + uint8_t RESERVED_16[216]; __IO uint32_t MBC_DOM2_MEM0_BLK_NSE_W[3]; /**< MBC Memory Block NonSecure Enable Word, array offset: 0x1540, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_17[52]; + uint8_t RESERVED_17[52]; __IO uint32_t MBC_DOM2_MEM1_BLK_CFG_W[1]; /**< MBC Memory Block Configuration Word, array offset: 0x1580, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_18[28]; + uint8_t RESERVED_18[28]; __IO uint32_t MBC_DOM2_MEM1_BLK_NSE_W[1]; /**< MBC Memory Block NonSecure Enable Word, array offset: 0x15A0, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_19[4]; + uint8_t RESERVED_19[4]; __IO uint32_t MBC_DOM2_MEM2_BLK_CFG_W[2]; /**< MBC Memory Block Configuration Word, array offset: 0x15A8, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_20[24]; + uint8_t RESERVED_20[24]; __IO uint32_t MBC_DOM2_MEM2_BLK_NSE_W[1]; /**< MBC Memory Block NonSecure Enable Word, array offset: 0x15C8, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_21[4]; + uint8_t RESERVED_21[4]; __IO uint32_t MBC_DOM2_MEM3_BLK_CFG_W[2]; /**< MBC Memory Block Configuration Word, array offset: 0x15D0, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_22[24]; + uint8_t RESERVED_22[24]; __IO uint32_t MBC_DOM2_MEM3_BLK_NSE_W[1]; /**< MBC Memory Block NonSecure Enable Word, array offset: 0x15F0, array step: index*0x1000, index2*0x4 */ - uint8_t RESERVED_23[2572]; + uint8_t RESERVED_23[2572]; } MBC_INDEX[3]; struct { /* offset: 0x4000, array step: 0x2C4 */ __I uint32_t MRC_GLBCFG; /**< MRC Global Configuration Register, array offset: 0x4000, array step: 0x2C4 */ - uint8_t RESERVED_0[12]; + uint8_t RESERVED_0[12]; __IO uint32_t MRC_NSE_RGN_INDIRECT; /**< MRC NonSecure Enable Region Indirect, array offset: 0x4010, array step: 0x2C4 */ __O uint32_t MRC_NSE_RGN_SET; /**< MRC NonSecure Enable Region Set, array offset: 0x4014, array step: 0x2C4 */ __O uint32_t MRC_NSE_RGN_CLR; /**< MRC NonSecure Enable Region Clear, array offset: 0x4018, array step: 0x2C4 */ __O uint32_t MRC_NSE_RGN_CLR_ALL; /**< MRC NonSecure Enable Region Clear All, array offset: 0x401C, array step: 0x2C4 */ __IO uint32_t MRC_GLBAC[8]; /**< MRC Global Access Control, array offset: 0x4020, array step: index*0x2C4, index2*0x4 */ __IO uint32_t MRC_DOM0_RGD_W[8][2]; /**< MRC Region Descriptor Word 0..MRC Region Descriptor Word 1, array offset: 0x4040, array step: index*0x2C4, index2*0x8, index3*0x4 */ - uint8_t RESERVED_1[64]; + uint8_t RESERVED_1[64]; __IO uint32_t MRC_DOM0_RGD_NSE; /**< MRC Region Descriptor NonSecure Enable, array offset: 0x40C0, array step: 0x2C4 */ - uint8_t RESERVED_2[124]; + uint8_t RESERVED_2[124]; __IO uint32_t MRC_DOM1_RGD_W[8][2]; /**< MRC Region Descriptor Word 0..MRC Region Descriptor Word 1, array offset: 0x4140, array step: index*0x2C4, index2*0x8, index3*0x4 */ - uint8_t RESERVED_3[64]; + uint8_t RESERVED_3[64]; __IO uint32_t MRC_DOM1_RGD_NSE; /**< MRC Region Descriptor NonSecure Enable, array offset: 0x41C0, array step: 0x2C4 */ - uint8_t RESERVED_4[124]; + uint8_t RESERVED_4[124]; __IO uint32_t MRC_DOM2_RGD_W[8][2]; /**< MRC Region Descriptor Word 0..MRC Region Descriptor Word 1, array offset: 0x4240, array step: index*0x2C4, index2*0x8, index3*0x4 */ - uint8_t RESERVED_5[64]; + uint8_t RESERVED_5[64]; __IO uint32_t MRC_DOM2_RGD_NSE; /**< MRC Region Descriptor NonSecure Enable, array offset: 0x42C0, array step: 0x2C4 */ } MRC_INDEX[1]; } TRDC_Type; @@ -39654,7 +39647,7 @@ typedef struct { /*! NSE0 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE0_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE0_MASK) @@ -39678,7 +39671,7 @@ typedef struct { /*! NSE1 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE1_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE1_MASK) @@ -39702,7 +39695,7 @@ typedef struct { /*! NSE2 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE2_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE2_MASK) @@ -39726,7 +39719,7 @@ typedef struct { /*! NSE3 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE3_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE3_MASK) @@ -39750,7 +39743,7 @@ typedef struct { /*! NSE4 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE4_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE4_MASK) @@ -39774,7 +39767,7 @@ typedef struct { /*! NSE5 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE5_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE5_MASK) @@ -39798,7 +39791,7 @@ typedef struct { /*! NSE6 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE6_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE6_MASK) @@ -39822,7 +39815,7 @@ typedef struct { /*! NSE7 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE7_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_CFG_W_NSE7_MASK) @@ -39842,7 +39835,7 @@ typedef struct { /*! BIT0 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT0_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT0_MASK) @@ -39852,7 +39845,7 @@ typedef struct { /*! BIT1 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT1_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT1_MASK) @@ -39862,7 +39855,7 @@ typedef struct { /*! BIT2 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT2_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT2_MASK) @@ -39872,7 +39865,7 @@ typedef struct { /*! BIT3 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT3_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT3_MASK) @@ -39882,7 +39875,7 @@ typedef struct { /*! BIT4 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT4_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT4_MASK) @@ -39892,7 +39885,7 @@ typedef struct { /*! BIT5 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT5_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT5_MASK) @@ -39902,7 +39895,7 @@ typedef struct { /*! BIT6 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT6_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT6_MASK) @@ -39912,7 +39905,7 @@ typedef struct { /*! BIT7 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT7_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT7_MASK) @@ -39922,7 +39915,7 @@ typedef struct { /*! BIT8 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT8(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT8_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT8_MASK) @@ -39932,7 +39925,7 @@ typedef struct { /*! BIT9 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT9(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT9_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT9_MASK) @@ -39942,7 +39935,7 @@ typedef struct { /*! BIT10 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT10(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT10_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT10_MASK) @@ -39952,7 +39945,7 @@ typedef struct { /*! BIT11 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT11(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT11_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT11_MASK) @@ -39962,7 +39955,7 @@ typedef struct { /*! BIT12 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT12(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT12_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT12_MASK) @@ -39972,7 +39965,7 @@ typedef struct { /*! BIT13 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT13(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT13_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT13_MASK) @@ -39982,7 +39975,7 @@ typedef struct { /*! BIT14 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT14(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT14_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT14_MASK) @@ -39992,7 +39985,7 @@ typedef struct { /*! BIT15 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT15(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT15_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT15_MASK) @@ -40002,7 +39995,7 @@ typedef struct { /*! BIT16 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT16(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT16_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT16_MASK) @@ -40012,7 +40005,7 @@ typedef struct { /*! BIT17 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT17(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT17_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT17_MASK) @@ -40022,7 +40015,7 @@ typedef struct { /*! BIT18 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT18(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT18_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT18_MASK) @@ -40032,7 +40025,7 @@ typedef struct { /*! BIT19 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT19(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT19_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT19_MASK) @@ -40042,7 +40035,7 @@ typedef struct { /*! BIT20 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT20(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT20_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT20_MASK) @@ -40052,7 +40045,7 @@ typedef struct { /*! BIT21 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT21(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT21_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT21_MASK) @@ -40062,7 +40055,7 @@ typedef struct { /*! BIT22 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT22(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT22_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT22_MASK) @@ -40072,7 +40065,7 @@ typedef struct { /*! BIT23 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT23(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT23_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT23_MASK) @@ -40082,7 +40075,7 @@ typedef struct { /*! BIT24 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT24(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT24_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT24_MASK) @@ -40092,7 +40085,7 @@ typedef struct { /*! BIT25 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT25(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT25_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT25_MASK) @@ -40102,7 +40095,7 @@ typedef struct { /*! BIT26 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT26(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT26_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT26_MASK) @@ -40112,7 +40105,7 @@ typedef struct { /*! BIT27 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT27(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT27_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT27_MASK) @@ -40122,7 +40115,7 @@ typedef struct { /*! BIT28 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT28(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT28_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT28_MASK) @@ -40132,7 +40125,7 @@ typedef struct { /*! BIT29 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT29(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT29_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT29_MASK) @@ -40142,7 +40135,7 @@ typedef struct { /*! BIT30 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT30(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT30_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT30_MASK) @@ -40152,7 +40145,7 @@ typedef struct { /*! BIT31 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT31(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT31_SHIFT)) & TRDC_MBC_DOM0_MEM0_BLK_NSE_W_BIT31_MASK) @@ -40186,7 +40179,7 @@ typedef struct { /*! NSE0 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE0_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE0_MASK) @@ -40210,7 +40203,7 @@ typedef struct { /*! NSE1 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE1_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE1_MASK) @@ -40234,7 +40227,7 @@ typedef struct { /*! NSE2 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE2_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE2_MASK) @@ -40258,7 +40251,7 @@ typedef struct { /*! NSE3 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE3_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE3_MASK) @@ -40282,7 +40275,7 @@ typedef struct { /*! NSE4 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE4_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE4_MASK) @@ -40306,7 +40299,7 @@ typedef struct { /*! NSE5 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE5_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE5_MASK) @@ -40330,7 +40323,7 @@ typedef struct { /*! NSE6 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE6_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE6_MASK) @@ -40354,7 +40347,7 @@ typedef struct { /*! NSE7 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE7_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_CFG_W_NSE7_MASK) @@ -40374,7 +40367,7 @@ typedef struct { /*! BIT0 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT0_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT0_MASK) @@ -40384,7 +40377,7 @@ typedef struct { /*! BIT1 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT1_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT1_MASK) @@ -40394,7 +40387,7 @@ typedef struct { /*! BIT2 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT2_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT2_MASK) @@ -40404,7 +40397,7 @@ typedef struct { /*! BIT3 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT3_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT3_MASK) @@ -40414,7 +40407,7 @@ typedef struct { /*! BIT4 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT4_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT4_MASK) @@ -40424,7 +40417,7 @@ typedef struct { /*! BIT5 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT5_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT5_MASK) @@ -40434,7 +40427,7 @@ typedef struct { /*! BIT6 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT6_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT6_MASK) @@ -40444,7 +40437,7 @@ typedef struct { /*! BIT7 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT7_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT7_MASK) @@ -40454,7 +40447,7 @@ typedef struct { /*! BIT8 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT8(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT8_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT8_MASK) @@ -40464,7 +40457,7 @@ typedef struct { /*! BIT9 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT9(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT9_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT9_MASK) @@ -40474,7 +40467,7 @@ typedef struct { /*! BIT10 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT10(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT10_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT10_MASK) @@ -40484,7 +40477,7 @@ typedef struct { /*! BIT11 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT11(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT11_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT11_MASK) @@ -40494,7 +40487,7 @@ typedef struct { /*! BIT12 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT12(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT12_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT12_MASK) @@ -40504,7 +40497,7 @@ typedef struct { /*! BIT13 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT13(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT13_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT13_MASK) @@ -40514,7 +40507,7 @@ typedef struct { /*! BIT14 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT14(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT14_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT14_MASK) @@ -40524,7 +40517,7 @@ typedef struct { /*! BIT15 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT15(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT15_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT15_MASK) @@ -40534,7 +40527,7 @@ typedef struct { /*! BIT16 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT16(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT16_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT16_MASK) @@ -40544,7 +40537,7 @@ typedef struct { /*! BIT17 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT17(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT17_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT17_MASK) @@ -40554,7 +40547,7 @@ typedef struct { /*! BIT18 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT18(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT18_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT18_MASK) @@ -40564,7 +40557,7 @@ typedef struct { /*! BIT19 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT19(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT19_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT19_MASK) @@ -40574,7 +40567,7 @@ typedef struct { /*! BIT20 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT20(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT20_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT20_MASK) @@ -40584,7 +40577,7 @@ typedef struct { /*! BIT21 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT21(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT21_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT21_MASK) @@ -40594,7 +40587,7 @@ typedef struct { /*! BIT22 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT22(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT22_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT22_MASK) @@ -40604,7 +40597,7 @@ typedef struct { /*! BIT23 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT23(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT23_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT23_MASK) @@ -40614,7 +40607,7 @@ typedef struct { /*! BIT24 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT24(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT24_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT24_MASK) @@ -40624,7 +40617,7 @@ typedef struct { /*! BIT25 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT25(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT25_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT25_MASK) @@ -40634,7 +40627,7 @@ typedef struct { /*! BIT26 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT26(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT26_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT26_MASK) @@ -40644,7 +40637,7 @@ typedef struct { /*! BIT27 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT27(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT27_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT27_MASK) @@ -40654,7 +40647,7 @@ typedef struct { /*! BIT28 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT28(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT28_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT28_MASK) @@ -40664,7 +40657,7 @@ typedef struct { /*! BIT29 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT29(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT29_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT29_MASK) @@ -40674,7 +40667,7 @@ typedef struct { /*! BIT30 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT30(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT30_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT30_MASK) @@ -40684,7 +40677,7 @@ typedef struct { /*! BIT31 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT31(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT31_SHIFT)) & TRDC_MBC_DOM0_MEM1_BLK_NSE_W_BIT31_MASK) @@ -40718,7 +40711,7 @@ typedef struct { /*! NSE0 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE0_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE0_MASK) @@ -40742,7 +40735,7 @@ typedef struct { /*! NSE1 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE1_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE1_MASK) @@ -40766,7 +40759,7 @@ typedef struct { /*! NSE2 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE2_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE2_MASK) @@ -40790,7 +40783,7 @@ typedef struct { /*! NSE3 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE3_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE3_MASK) @@ -40814,7 +40807,7 @@ typedef struct { /*! NSE4 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE4_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE4_MASK) @@ -40838,7 +40831,7 @@ typedef struct { /*! NSE5 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE5_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE5_MASK) @@ -40862,7 +40855,7 @@ typedef struct { /*! NSE6 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE6_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE6_MASK) @@ -40886,7 +40879,7 @@ typedef struct { /*! NSE7 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE7_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_CFG_W_NSE7_MASK) @@ -40906,7 +40899,7 @@ typedef struct { /*! BIT0 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT0_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT0_MASK) @@ -40916,7 +40909,7 @@ typedef struct { /*! BIT1 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT1_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT1_MASK) @@ -40926,7 +40919,7 @@ typedef struct { /*! BIT2 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT2_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT2_MASK) @@ -40936,7 +40929,7 @@ typedef struct { /*! BIT3 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT3_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT3_MASK) @@ -40946,7 +40939,7 @@ typedef struct { /*! BIT4 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT4_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT4_MASK) @@ -40956,7 +40949,7 @@ typedef struct { /*! BIT5 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT5_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT5_MASK) @@ -40966,7 +40959,7 @@ typedef struct { /*! BIT6 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT6_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT6_MASK) @@ -40976,7 +40969,7 @@ typedef struct { /*! BIT7 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT7_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT7_MASK) @@ -40986,7 +40979,7 @@ typedef struct { /*! BIT8 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT8(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT8_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT8_MASK) @@ -40996,7 +40989,7 @@ typedef struct { /*! BIT9 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT9(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT9_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT9_MASK) @@ -41006,7 +40999,7 @@ typedef struct { /*! BIT10 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT10(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT10_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT10_MASK) @@ -41016,7 +41009,7 @@ typedef struct { /*! BIT11 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT11(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT11_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT11_MASK) @@ -41026,7 +41019,7 @@ typedef struct { /*! BIT12 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT12(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT12_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT12_MASK) @@ -41036,7 +41029,7 @@ typedef struct { /*! BIT13 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT13(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT13_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT13_MASK) @@ -41046,7 +41039,7 @@ typedef struct { /*! BIT14 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT14(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT14_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT14_MASK) @@ -41056,7 +41049,7 @@ typedef struct { /*! BIT15 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT15(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT15_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT15_MASK) @@ -41066,7 +41059,7 @@ typedef struct { /*! BIT16 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT16(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT16_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT16_MASK) @@ -41076,7 +41069,7 @@ typedef struct { /*! BIT17 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT17(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT17_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT17_MASK) @@ -41086,7 +41079,7 @@ typedef struct { /*! BIT18 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT18(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT18_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT18_MASK) @@ -41096,7 +41089,7 @@ typedef struct { /*! BIT19 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT19(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT19_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT19_MASK) @@ -41106,7 +41099,7 @@ typedef struct { /*! BIT20 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT20(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT20_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT20_MASK) @@ -41116,7 +41109,7 @@ typedef struct { /*! BIT21 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT21(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT21_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT21_MASK) @@ -41126,7 +41119,7 @@ typedef struct { /*! BIT22 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT22(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT22_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT22_MASK) @@ -41136,7 +41129,7 @@ typedef struct { /*! BIT23 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT23(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT23_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT23_MASK) @@ -41146,7 +41139,7 @@ typedef struct { /*! BIT24 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT24(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT24_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT24_MASK) @@ -41156,7 +41149,7 @@ typedef struct { /*! BIT25 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT25(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT25_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT25_MASK) @@ -41166,7 +41159,7 @@ typedef struct { /*! BIT26 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT26(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT26_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT26_MASK) @@ -41176,7 +41169,7 @@ typedef struct { /*! BIT27 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT27(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT27_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT27_MASK) @@ -41186,7 +41179,7 @@ typedef struct { /*! BIT28 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT28(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT28_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT28_MASK) @@ -41196,7 +41189,7 @@ typedef struct { /*! BIT29 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT29(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT29_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT29_MASK) @@ -41206,7 +41199,7 @@ typedef struct { /*! BIT30 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT30(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT30_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT30_MASK) @@ -41216,7 +41209,7 @@ typedef struct { /*! BIT31 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT31(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT31_SHIFT)) & TRDC_MBC_DOM0_MEM2_BLK_NSE_W_BIT31_MASK) @@ -41250,7 +41243,7 @@ typedef struct { /*! NSE0 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE0_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE0_MASK) @@ -41274,7 +41267,7 @@ typedef struct { /*! NSE1 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE1_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE1_MASK) @@ -41298,7 +41291,7 @@ typedef struct { /*! NSE2 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE2_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE2_MASK) @@ -41322,7 +41315,7 @@ typedef struct { /*! NSE3 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE3_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE3_MASK) @@ -41346,7 +41339,7 @@ typedef struct { /*! NSE4 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE4_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE4_MASK) @@ -41370,7 +41363,7 @@ typedef struct { /*! NSE5 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE5_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE5_MASK) @@ -41394,7 +41387,7 @@ typedef struct { /*! NSE6 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE6_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE6_MASK) @@ -41418,7 +41411,7 @@ typedef struct { /*! NSE7 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE7_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_CFG_W_NSE7_MASK) @@ -41438,7 +41431,7 @@ typedef struct { /*! BIT0 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT0_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT0_MASK) @@ -41448,7 +41441,7 @@ typedef struct { /*! BIT1 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT1_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT1_MASK) @@ -41458,7 +41451,7 @@ typedef struct { /*! BIT2 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT2_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT2_MASK) @@ -41468,7 +41461,7 @@ typedef struct { /*! BIT3 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT3_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT3_MASK) @@ -41478,7 +41471,7 @@ typedef struct { /*! BIT4 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT4_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT4_MASK) @@ -41488,7 +41481,7 @@ typedef struct { /*! BIT5 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT5_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT5_MASK) @@ -41498,7 +41491,7 @@ typedef struct { /*! BIT6 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT6_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT6_MASK) @@ -41508,7 +41501,7 @@ typedef struct { /*! BIT7 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT7_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT7_MASK) @@ -41518,7 +41511,7 @@ typedef struct { /*! BIT8 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT8(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT8_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT8_MASK) @@ -41528,7 +41521,7 @@ typedef struct { /*! BIT9 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT9(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT9_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT9_MASK) @@ -41538,7 +41531,7 @@ typedef struct { /*! BIT10 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT10(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT10_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT10_MASK) @@ -41548,7 +41541,7 @@ typedef struct { /*! BIT11 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT11(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT11_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT11_MASK) @@ -41558,7 +41551,7 @@ typedef struct { /*! BIT12 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT12(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT12_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT12_MASK) @@ -41568,7 +41561,7 @@ typedef struct { /*! BIT13 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT13(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT13_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT13_MASK) @@ -41578,7 +41571,7 @@ typedef struct { /*! BIT14 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT14(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT14_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT14_MASK) @@ -41588,7 +41581,7 @@ typedef struct { /*! BIT15 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT15(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT15_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT15_MASK) @@ -41598,7 +41591,7 @@ typedef struct { /*! BIT16 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT16(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT16_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT16_MASK) @@ -41608,7 +41601,7 @@ typedef struct { /*! BIT17 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT17(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT17_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT17_MASK) @@ -41618,7 +41611,7 @@ typedef struct { /*! BIT18 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT18(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT18_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT18_MASK) @@ -41628,7 +41621,7 @@ typedef struct { /*! BIT19 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT19(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT19_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT19_MASK) @@ -41638,7 +41631,7 @@ typedef struct { /*! BIT20 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT20(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT20_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT20_MASK) @@ -41648,7 +41641,7 @@ typedef struct { /*! BIT21 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT21(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT21_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT21_MASK) @@ -41658,7 +41651,7 @@ typedef struct { /*! BIT22 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT22(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT22_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT22_MASK) @@ -41668,7 +41661,7 @@ typedef struct { /*! BIT23 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT23(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT23_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT23_MASK) @@ -41678,7 +41671,7 @@ typedef struct { /*! BIT24 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT24(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT24_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT24_MASK) @@ -41688,7 +41681,7 @@ typedef struct { /*! BIT25 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT25(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT25_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT25_MASK) @@ -41698,7 +41691,7 @@ typedef struct { /*! BIT26 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT26(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT26_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT26_MASK) @@ -41708,7 +41701,7 @@ typedef struct { /*! BIT27 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT27(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT27_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT27_MASK) @@ -41718,7 +41711,7 @@ typedef struct { /*! BIT28 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT28(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT28_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT28_MASK) @@ -41728,7 +41721,7 @@ typedef struct { /*! BIT29 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT29(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT29_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT29_MASK) @@ -41738,7 +41731,7 @@ typedef struct { /*! BIT30 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT30(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT30_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT30_MASK) @@ -41748,7 +41741,7 @@ typedef struct { /*! BIT31 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT31(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT31_SHIFT)) & TRDC_MBC_DOM0_MEM3_BLK_NSE_W_BIT31_MASK) @@ -41782,7 +41775,7 @@ typedef struct { /*! NSE0 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE0_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE0_MASK) @@ -41806,7 +41799,7 @@ typedef struct { /*! NSE1 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE1_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE1_MASK) @@ -41830,7 +41823,7 @@ typedef struct { /*! NSE2 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE2_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE2_MASK) @@ -41854,7 +41847,7 @@ typedef struct { /*! NSE3 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE3_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE3_MASK) @@ -41878,7 +41871,7 @@ typedef struct { /*! NSE4 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE4_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE4_MASK) @@ -41902,7 +41895,7 @@ typedef struct { /*! NSE5 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE5_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE5_MASK) @@ -41926,7 +41919,7 @@ typedef struct { /*! NSE6 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE6_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE6_MASK) @@ -41950,7 +41943,7 @@ typedef struct { /*! NSE7 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE7_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_CFG_W_NSE7_MASK) @@ -41970,7 +41963,7 @@ typedef struct { /*! BIT0 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT0_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT0_MASK) @@ -41980,7 +41973,7 @@ typedef struct { /*! BIT1 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT1_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT1_MASK) @@ -41990,7 +41983,7 @@ typedef struct { /*! BIT2 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT2_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT2_MASK) @@ -42000,7 +41993,7 @@ typedef struct { /*! BIT3 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT3_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT3_MASK) @@ -42010,7 +42003,7 @@ typedef struct { /*! BIT4 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT4_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT4_MASK) @@ -42020,7 +42013,7 @@ typedef struct { /*! BIT5 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT5_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT5_MASK) @@ -42030,7 +42023,7 @@ typedef struct { /*! BIT6 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT6_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT6_MASK) @@ -42040,7 +42033,7 @@ typedef struct { /*! BIT7 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT7_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT7_MASK) @@ -42050,7 +42043,7 @@ typedef struct { /*! BIT8 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT8(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT8_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT8_MASK) @@ -42060,7 +42053,7 @@ typedef struct { /*! BIT9 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT9(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT9_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT9_MASK) @@ -42070,7 +42063,7 @@ typedef struct { /*! BIT10 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT10(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT10_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT10_MASK) @@ -42080,7 +42073,7 @@ typedef struct { /*! BIT11 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT11(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT11_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT11_MASK) @@ -42090,7 +42083,7 @@ typedef struct { /*! BIT12 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT12(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT12_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT12_MASK) @@ -42100,7 +42093,7 @@ typedef struct { /*! BIT13 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT13(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT13_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT13_MASK) @@ -42110,7 +42103,7 @@ typedef struct { /*! BIT14 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT14(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT14_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT14_MASK) @@ -42120,7 +42113,7 @@ typedef struct { /*! BIT15 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT15(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT15_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT15_MASK) @@ -42130,7 +42123,7 @@ typedef struct { /*! BIT16 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT16(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT16_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT16_MASK) @@ -42140,7 +42133,7 @@ typedef struct { /*! BIT17 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT17(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT17_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT17_MASK) @@ -42150,7 +42143,7 @@ typedef struct { /*! BIT18 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT18(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT18_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT18_MASK) @@ -42160,7 +42153,7 @@ typedef struct { /*! BIT19 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT19(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT19_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT19_MASK) @@ -42170,7 +42163,7 @@ typedef struct { /*! BIT20 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT20(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT20_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT20_MASK) @@ -42180,7 +42173,7 @@ typedef struct { /*! BIT21 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT21(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT21_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT21_MASK) @@ -42190,7 +42183,7 @@ typedef struct { /*! BIT22 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT22(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT22_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT22_MASK) @@ -42200,7 +42193,7 @@ typedef struct { /*! BIT23 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT23(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT23_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT23_MASK) @@ -42210,7 +42203,7 @@ typedef struct { /*! BIT24 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT24(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT24_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT24_MASK) @@ -42220,7 +42213,7 @@ typedef struct { /*! BIT25 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT25(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT25_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT25_MASK) @@ -42230,7 +42223,7 @@ typedef struct { /*! BIT26 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT26(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT26_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT26_MASK) @@ -42240,7 +42233,7 @@ typedef struct { /*! BIT27 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT27(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT27_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT27_MASK) @@ -42250,7 +42243,7 @@ typedef struct { /*! BIT28 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT28(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT28_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT28_MASK) @@ -42260,7 +42253,7 @@ typedef struct { /*! BIT29 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT29(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT29_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT29_MASK) @@ -42270,7 +42263,7 @@ typedef struct { /*! BIT30 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT30(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT30_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT30_MASK) @@ -42280,7 +42273,7 @@ typedef struct { /*! BIT31 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT31(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT31_SHIFT)) & TRDC_MBC_DOM1_MEM0_BLK_NSE_W_BIT31_MASK) @@ -42314,7 +42307,7 @@ typedef struct { /*! NSE0 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE0_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE0_MASK) @@ -42338,7 +42331,7 @@ typedef struct { /*! NSE1 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE1_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE1_MASK) @@ -42362,7 +42355,7 @@ typedef struct { /*! NSE2 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE2_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE2_MASK) @@ -42386,7 +42379,7 @@ typedef struct { /*! NSE3 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE3_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE3_MASK) @@ -42410,7 +42403,7 @@ typedef struct { /*! NSE4 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE4_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE4_MASK) @@ -42434,7 +42427,7 @@ typedef struct { /*! NSE5 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE5_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE5_MASK) @@ -42458,7 +42451,7 @@ typedef struct { /*! NSE6 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE6_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE6_MASK) @@ -42482,7 +42475,7 @@ typedef struct { /*! NSE7 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE7_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_CFG_W_NSE7_MASK) @@ -42502,7 +42495,7 @@ typedef struct { /*! BIT0 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT0_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT0_MASK) @@ -42512,7 +42505,7 @@ typedef struct { /*! BIT1 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT1_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT1_MASK) @@ -42522,7 +42515,7 @@ typedef struct { /*! BIT2 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT2_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT2_MASK) @@ -42532,7 +42525,7 @@ typedef struct { /*! BIT3 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT3_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT3_MASK) @@ -42542,7 +42535,7 @@ typedef struct { /*! BIT4 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT4_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT4_MASK) @@ -42552,7 +42545,7 @@ typedef struct { /*! BIT5 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT5_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT5_MASK) @@ -42562,7 +42555,7 @@ typedef struct { /*! BIT6 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT6_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT6_MASK) @@ -42572,7 +42565,7 @@ typedef struct { /*! BIT7 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT7_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT7_MASK) @@ -42582,7 +42575,7 @@ typedef struct { /*! BIT8 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT8(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT8_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT8_MASK) @@ -42592,7 +42585,7 @@ typedef struct { /*! BIT9 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT9(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT9_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT9_MASK) @@ -42602,7 +42595,7 @@ typedef struct { /*! BIT10 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT10(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT10_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT10_MASK) @@ -42612,7 +42605,7 @@ typedef struct { /*! BIT11 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT11(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT11_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT11_MASK) @@ -42622,7 +42615,7 @@ typedef struct { /*! BIT12 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT12(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT12_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT12_MASK) @@ -42632,7 +42625,7 @@ typedef struct { /*! BIT13 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT13(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT13_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT13_MASK) @@ -42642,7 +42635,7 @@ typedef struct { /*! BIT14 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT14(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT14_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT14_MASK) @@ -42652,7 +42645,7 @@ typedef struct { /*! BIT15 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT15(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT15_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT15_MASK) @@ -42662,7 +42655,7 @@ typedef struct { /*! BIT16 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT16(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT16_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT16_MASK) @@ -42672,7 +42665,7 @@ typedef struct { /*! BIT17 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT17(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT17_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT17_MASK) @@ -42682,7 +42675,7 @@ typedef struct { /*! BIT18 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT18(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT18_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT18_MASK) @@ -42692,7 +42685,7 @@ typedef struct { /*! BIT19 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT19(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT19_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT19_MASK) @@ -42702,7 +42695,7 @@ typedef struct { /*! BIT20 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT20(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT20_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT20_MASK) @@ -42712,7 +42705,7 @@ typedef struct { /*! BIT21 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT21(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT21_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT21_MASK) @@ -42722,7 +42715,7 @@ typedef struct { /*! BIT22 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT22(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT22_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT22_MASK) @@ -42732,7 +42725,7 @@ typedef struct { /*! BIT23 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT23(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT23_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT23_MASK) @@ -42742,7 +42735,7 @@ typedef struct { /*! BIT24 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT24(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT24_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT24_MASK) @@ -42752,7 +42745,7 @@ typedef struct { /*! BIT25 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT25(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT25_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT25_MASK) @@ -42762,7 +42755,7 @@ typedef struct { /*! BIT26 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT26(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT26_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT26_MASK) @@ -42772,7 +42765,7 @@ typedef struct { /*! BIT27 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT27(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT27_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT27_MASK) @@ -42782,7 +42775,7 @@ typedef struct { /*! BIT28 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT28(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT28_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT28_MASK) @@ -42792,7 +42785,7 @@ typedef struct { /*! BIT29 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT29(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT29_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT29_MASK) @@ -42802,7 +42795,7 @@ typedef struct { /*! BIT30 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT30(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT30_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT30_MASK) @@ -42812,7 +42805,7 @@ typedef struct { /*! BIT31 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT31(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT31_SHIFT)) & TRDC_MBC_DOM1_MEM1_BLK_NSE_W_BIT31_MASK) @@ -42846,7 +42839,7 @@ typedef struct { /*! NSE0 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE0_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE0_MASK) @@ -42870,7 +42863,7 @@ typedef struct { /*! NSE1 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE1_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE1_MASK) @@ -42894,7 +42887,7 @@ typedef struct { /*! NSE2 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE2_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE2_MASK) @@ -42918,7 +42911,7 @@ typedef struct { /*! NSE3 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE3_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE3_MASK) @@ -42942,7 +42935,7 @@ typedef struct { /*! NSE4 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE4_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE4_MASK) @@ -42966,7 +42959,7 @@ typedef struct { /*! NSE5 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE5_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE5_MASK) @@ -42990,7 +42983,7 @@ typedef struct { /*! NSE6 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE6_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE6_MASK) @@ -43014,7 +43007,7 @@ typedef struct { /*! NSE7 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE7_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_CFG_W_NSE7_MASK) @@ -43034,7 +43027,7 @@ typedef struct { /*! BIT0 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT0_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT0_MASK) @@ -43044,7 +43037,7 @@ typedef struct { /*! BIT1 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT1_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT1_MASK) @@ -43054,7 +43047,7 @@ typedef struct { /*! BIT2 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT2_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT2_MASK) @@ -43064,7 +43057,7 @@ typedef struct { /*! BIT3 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT3_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT3_MASK) @@ -43074,7 +43067,7 @@ typedef struct { /*! BIT4 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT4_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT4_MASK) @@ -43084,7 +43077,7 @@ typedef struct { /*! BIT5 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT5_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT5_MASK) @@ -43094,7 +43087,7 @@ typedef struct { /*! BIT6 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT6_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT6_MASK) @@ -43104,7 +43097,7 @@ typedef struct { /*! BIT7 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT7_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT7_MASK) @@ -43114,7 +43107,7 @@ typedef struct { /*! BIT8 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT8(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT8_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT8_MASK) @@ -43124,7 +43117,7 @@ typedef struct { /*! BIT9 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT9(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT9_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT9_MASK) @@ -43134,7 +43127,7 @@ typedef struct { /*! BIT10 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT10(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT10_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT10_MASK) @@ -43144,7 +43137,7 @@ typedef struct { /*! BIT11 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT11(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT11_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT11_MASK) @@ -43154,7 +43147,7 @@ typedef struct { /*! BIT12 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT12(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT12_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT12_MASK) @@ -43164,7 +43157,7 @@ typedef struct { /*! BIT13 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT13(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT13_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT13_MASK) @@ -43174,7 +43167,7 @@ typedef struct { /*! BIT14 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT14(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT14_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT14_MASK) @@ -43184,7 +43177,7 @@ typedef struct { /*! BIT15 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT15(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT15_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT15_MASK) @@ -43194,7 +43187,7 @@ typedef struct { /*! BIT16 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT16(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT16_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT16_MASK) @@ -43204,7 +43197,7 @@ typedef struct { /*! BIT17 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT17(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT17_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT17_MASK) @@ -43214,7 +43207,7 @@ typedef struct { /*! BIT18 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT18(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT18_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT18_MASK) @@ -43224,7 +43217,7 @@ typedef struct { /*! BIT19 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT19(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT19_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT19_MASK) @@ -43234,7 +43227,7 @@ typedef struct { /*! BIT20 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT20(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT20_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT20_MASK) @@ -43244,7 +43237,7 @@ typedef struct { /*! BIT21 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT21(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT21_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT21_MASK) @@ -43254,7 +43247,7 @@ typedef struct { /*! BIT22 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT22(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT22_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT22_MASK) @@ -43264,7 +43257,7 @@ typedef struct { /*! BIT23 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT23(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT23_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT23_MASK) @@ -43274,7 +43267,7 @@ typedef struct { /*! BIT24 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT24(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT24_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT24_MASK) @@ -43284,7 +43277,7 @@ typedef struct { /*! BIT25 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT25(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT25_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT25_MASK) @@ -43294,7 +43287,7 @@ typedef struct { /*! BIT26 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT26(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT26_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT26_MASK) @@ -43304,7 +43297,7 @@ typedef struct { /*! BIT27 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT27(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT27_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT27_MASK) @@ -43314,7 +43307,7 @@ typedef struct { /*! BIT28 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT28(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT28_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT28_MASK) @@ -43324,7 +43317,7 @@ typedef struct { /*! BIT29 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT29(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT29_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT29_MASK) @@ -43334,7 +43327,7 @@ typedef struct { /*! BIT30 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT30(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT30_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT30_MASK) @@ -43344,7 +43337,7 @@ typedef struct { /*! BIT31 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT31(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT31_SHIFT)) & TRDC_MBC_DOM1_MEM2_BLK_NSE_W_BIT31_MASK) @@ -43378,7 +43371,7 @@ typedef struct { /*! NSE0 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE0_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE0_MASK) @@ -43402,7 +43395,7 @@ typedef struct { /*! NSE1 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE1_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE1_MASK) @@ -43426,7 +43419,7 @@ typedef struct { /*! NSE2 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE2_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE2_MASK) @@ -43450,7 +43443,7 @@ typedef struct { /*! NSE3 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE3_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE3_MASK) @@ -43474,7 +43467,7 @@ typedef struct { /*! NSE4 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE4_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE4_MASK) @@ -43498,7 +43491,7 @@ typedef struct { /*! NSE5 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE5_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE5_MASK) @@ -43522,7 +43515,7 @@ typedef struct { /*! NSE6 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE6_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE6_MASK) @@ -43546,7 +43539,7 @@ typedef struct { /*! NSE7 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE7_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_CFG_W_NSE7_MASK) @@ -43566,7 +43559,7 @@ typedef struct { /*! BIT0 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT0_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT0_MASK) @@ -43576,7 +43569,7 @@ typedef struct { /*! BIT1 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT1_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT1_MASK) @@ -43586,7 +43579,7 @@ typedef struct { /*! BIT2 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT2_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT2_MASK) @@ -43596,7 +43589,7 @@ typedef struct { /*! BIT3 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT3_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT3_MASK) @@ -43606,7 +43599,7 @@ typedef struct { /*! BIT4 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT4_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT4_MASK) @@ -43616,7 +43609,7 @@ typedef struct { /*! BIT5 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT5_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT5_MASK) @@ -43626,7 +43619,7 @@ typedef struct { /*! BIT6 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT6_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT6_MASK) @@ -43636,7 +43629,7 @@ typedef struct { /*! BIT7 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT7_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT7_MASK) @@ -43646,7 +43639,7 @@ typedef struct { /*! BIT8 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT8(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT8_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT8_MASK) @@ -43656,7 +43649,7 @@ typedef struct { /*! BIT9 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT9(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT9_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT9_MASK) @@ -43666,7 +43659,7 @@ typedef struct { /*! BIT10 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT10(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT10_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT10_MASK) @@ -43676,7 +43669,7 @@ typedef struct { /*! BIT11 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT11(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT11_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT11_MASK) @@ -43686,7 +43679,7 @@ typedef struct { /*! BIT12 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT12(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT12_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT12_MASK) @@ -43696,7 +43689,7 @@ typedef struct { /*! BIT13 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT13(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT13_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT13_MASK) @@ -43706,7 +43699,7 @@ typedef struct { /*! BIT14 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT14(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT14_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT14_MASK) @@ -43716,7 +43709,7 @@ typedef struct { /*! BIT15 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT15(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT15_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT15_MASK) @@ -43726,7 +43719,7 @@ typedef struct { /*! BIT16 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT16(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT16_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT16_MASK) @@ -43736,7 +43729,7 @@ typedef struct { /*! BIT17 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT17(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT17_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT17_MASK) @@ -43746,7 +43739,7 @@ typedef struct { /*! BIT18 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT18(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT18_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT18_MASK) @@ -43756,7 +43749,7 @@ typedef struct { /*! BIT19 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT19(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT19_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT19_MASK) @@ -43766,7 +43759,7 @@ typedef struct { /*! BIT20 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT20(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT20_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT20_MASK) @@ -43776,7 +43769,7 @@ typedef struct { /*! BIT21 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT21(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT21_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT21_MASK) @@ -43786,7 +43779,7 @@ typedef struct { /*! BIT22 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT22(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT22_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT22_MASK) @@ -43796,7 +43789,7 @@ typedef struct { /*! BIT23 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT23(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT23_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT23_MASK) @@ -43806,7 +43799,7 @@ typedef struct { /*! BIT24 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT24(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT24_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT24_MASK) @@ -43816,7 +43809,7 @@ typedef struct { /*! BIT25 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT25(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT25_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT25_MASK) @@ -43826,7 +43819,7 @@ typedef struct { /*! BIT26 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT26(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT26_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT26_MASK) @@ -43836,7 +43829,7 @@ typedef struct { /*! BIT27 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT27(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT27_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT27_MASK) @@ -43846,7 +43839,7 @@ typedef struct { /*! BIT28 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT28(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT28_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT28_MASK) @@ -43856,7 +43849,7 @@ typedef struct { /*! BIT29 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT29(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT29_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT29_MASK) @@ -43866,7 +43859,7 @@ typedef struct { /*! BIT30 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT30(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT30_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT30_MASK) @@ -43876,7 +43869,7 @@ typedef struct { /*! BIT31 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT31(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT31_SHIFT)) & TRDC_MBC_DOM1_MEM3_BLK_NSE_W_BIT31_MASK) @@ -43910,7 +43903,7 @@ typedef struct { /*! NSE0 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE0_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE0_MASK) @@ -43934,7 +43927,7 @@ typedef struct { /*! NSE1 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE1_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE1_MASK) @@ -43958,7 +43951,7 @@ typedef struct { /*! NSE2 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE2_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE2_MASK) @@ -43982,7 +43975,7 @@ typedef struct { /*! NSE3 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE3_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE3_MASK) @@ -44006,7 +43999,7 @@ typedef struct { /*! NSE4 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE4_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE4_MASK) @@ -44030,7 +44023,7 @@ typedef struct { /*! NSE5 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE5_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE5_MASK) @@ -44054,7 +44047,7 @@ typedef struct { /*! NSE6 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE6_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE6_MASK) @@ -44078,7 +44071,7 @@ typedef struct { /*! NSE7 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE7_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_CFG_W_NSE7_MASK) @@ -44098,7 +44091,7 @@ typedef struct { /*! BIT0 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT0_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT0_MASK) @@ -44108,7 +44101,7 @@ typedef struct { /*! BIT1 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT1_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT1_MASK) @@ -44118,7 +44111,7 @@ typedef struct { /*! BIT2 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT2_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT2_MASK) @@ -44128,7 +44121,7 @@ typedef struct { /*! BIT3 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT3_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT3_MASK) @@ -44138,7 +44131,7 @@ typedef struct { /*! BIT4 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT4_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT4_MASK) @@ -44148,7 +44141,7 @@ typedef struct { /*! BIT5 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT5_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT5_MASK) @@ -44158,7 +44151,7 @@ typedef struct { /*! BIT6 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT6_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT6_MASK) @@ -44168,7 +44161,7 @@ typedef struct { /*! BIT7 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT7_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT7_MASK) @@ -44178,7 +44171,7 @@ typedef struct { /*! BIT8 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT8(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT8_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT8_MASK) @@ -44188,7 +44181,7 @@ typedef struct { /*! BIT9 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT9(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT9_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT9_MASK) @@ -44198,7 +44191,7 @@ typedef struct { /*! BIT10 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT10(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT10_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT10_MASK) @@ -44208,7 +44201,7 @@ typedef struct { /*! BIT11 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT11(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT11_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT11_MASK) @@ -44218,7 +44211,7 @@ typedef struct { /*! BIT12 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT12(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT12_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT12_MASK) @@ -44228,7 +44221,7 @@ typedef struct { /*! BIT13 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT13(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT13_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT13_MASK) @@ -44238,7 +44231,7 @@ typedef struct { /*! BIT14 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT14(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT14_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT14_MASK) @@ -44248,7 +44241,7 @@ typedef struct { /*! BIT15 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT15(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT15_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT15_MASK) @@ -44258,7 +44251,7 @@ typedef struct { /*! BIT16 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT16(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT16_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT16_MASK) @@ -44268,7 +44261,7 @@ typedef struct { /*! BIT17 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT17(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT17_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT17_MASK) @@ -44278,7 +44271,7 @@ typedef struct { /*! BIT18 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT18(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT18_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT18_MASK) @@ -44288,7 +44281,7 @@ typedef struct { /*! BIT19 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT19(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT19_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT19_MASK) @@ -44298,7 +44291,7 @@ typedef struct { /*! BIT20 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT20(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT20_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT20_MASK) @@ -44308,7 +44301,7 @@ typedef struct { /*! BIT21 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT21(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT21_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT21_MASK) @@ -44318,7 +44311,7 @@ typedef struct { /*! BIT22 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT22(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT22_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT22_MASK) @@ -44328,7 +44321,7 @@ typedef struct { /*! BIT23 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT23(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT23_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT23_MASK) @@ -44338,7 +44331,7 @@ typedef struct { /*! BIT24 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT24(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT24_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT24_MASK) @@ -44348,7 +44341,7 @@ typedef struct { /*! BIT25 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT25(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT25_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT25_MASK) @@ -44358,7 +44351,7 @@ typedef struct { /*! BIT26 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT26(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT26_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT26_MASK) @@ -44368,7 +44361,7 @@ typedef struct { /*! BIT27 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT27(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT27_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT27_MASK) @@ -44378,7 +44371,7 @@ typedef struct { /*! BIT28 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT28(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT28_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT28_MASK) @@ -44388,7 +44381,7 @@ typedef struct { /*! BIT29 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT29(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT29_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT29_MASK) @@ -44398,7 +44391,7 @@ typedef struct { /*! BIT30 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT30(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT30_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT30_MASK) @@ -44408,7 +44401,7 @@ typedef struct { /*! BIT31 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT31(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT31_SHIFT)) & TRDC_MBC_DOM2_MEM0_BLK_NSE_W_BIT31_MASK) @@ -44442,7 +44435,7 @@ typedef struct { /*! NSE0 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE0_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE0_MASK) @@ -44466,7 +44459,7 @@ typedef struct { /*! NSE1 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE1_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE1_MASK) @@ -44490,7 +44483,7 @@ typedef struct { /*! NSE2 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE2_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE2_MASK) @@ -44514,7 +44507,7 @@ typedef struct { /*! NSE3 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE3_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE3_MASK) @@ -44538,7 +44531,7 @@ typedef struct { /*! NSE4 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE4_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE4_MASK) @@ -44562,7 +44555,7 @@ typedef struct { /*! NSE5 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE5_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE5_MASK) @@ -44586,7 +44579,7 @@ typedef struct { /*! NSE6 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE6_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE6_MASK) @@ -44610,7 +44603,7 @@ typedef struct { /*! NSE7 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE7_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_CFG_W_NSE7_MASK) @@ -44630,7 +44623,7 @@ typedef struct { /*! BIT0 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT0_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT0_MASK) @@ -44640,7 +44633,7 @@ typedef struct { /*! BIT1 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT1_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT1_MASK) @@ -44650,7 +44643,7 @@ typedef struct { /*! BIT2 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT2_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT2_MASK) @@ -44660,7 +44653,7 @@ typedef struct { /*! BIT3 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT3_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT3_MASK) @@ -44670,7 +44663,7 @@ typedef struct { /*! BIT4 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT4_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT4_MASK) @@ -44680,7 +44673,7 @@ typedef struct { /*! BIT5 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT5_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT5_MASK) @@ -44690,7 +44683,7 @@ typedef struct { /*! BIT6 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT6_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT6_MASK) @@ -44700,7 +44693,7 @@ typedef struct { /*! BIT7 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT7_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT7_MASK) @@ -44710,7 +44703,7 @@ typedef struct { /*! BIT8 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT8(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT8_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT8_MASK) @@ -44720,7 +44713,7 @@ typedef struct { /*! BIT9 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT9(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT9_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT9_MASK) @@ -44730,7 +44723,7 @@ typedef struct { /*! BIT10 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT10(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT10_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT10_MASK) @@ -44740,7 +44733,7 @@ typedef struct { /*! BIT11 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT11(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT11_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT11_MASK) @@ -44750,7 +44743,7 @@ typedef struct { /*! BIT12 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT12(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT12_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT12_MASK) @@ -44760,7 +44753,7 @@ typedef struct { /*! BIT13 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT13(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT13_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT13_MASK) @@ -44770,7 +44763,7 @@ typedef struct { /*! BIT14 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT14(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT14_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT14_MASK) @@ -44780,7 +44773,7 @@ typedef struct { /*! BIT15 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT15(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT15_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT15_MASK) @@ -44790,7 +44783,7 @@ typedef struct { /*! BIT16 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT16(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT16_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT16_MASK) @@ -44800,7 +44793,7 @@ typedef struct { /*! BIT17 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT17(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT17_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT17_MASK) @@ -44810,7 +44803,7 @@ typedef struct { /*! BIT18 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT18(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT18_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT18_MASK) @@ -44820,7 +44813,7 @@ typedef struct { /*! BIT19 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT19(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT19_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT19_MASK) @@ -44830,7 +44823,7 @@ typedef struct { /*! BIT20 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT20(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT20_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT20_MASK) @@ -44840,7 +44833,7 @@ typedef struct { /*! BIT21 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT21(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT21_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT21_MASK) @@ -44850,7 +44843,7 @@ typedef struct { /*! BIT22 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT22(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT22_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT22_MASK) @@ -44860,7 +44853,7 @@ typedef struct { /*! BIT23 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT23(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT23_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT23_MASK) @@ -44870,7 +44863,7 @@ typedef struct { /*! BIT24 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT24(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT24_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT24_MASK) @@ -44880,7 +44873,7 @@ typedef struct { /*! BIT25 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT25(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT25_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT25_MASK) @@ -44890,7 +44883,7 @@ typedef struct { /*! BIT26 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT26(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT26_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT26_MASK) @@ -44900,7 +44893,7 @@ typedef struct { /*! BIT27 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT27(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT27_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT27_MASK) @@ -44910,7 +44903,7 @@ typedef struct { /*! BIT28 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT28(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT28_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT28_MASK) @@ -44920,7 +44913,7 @@ typedef struct { /*! BIT29 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT29(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT29_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT29_MASK) @@ -44930,7 +44923,7 @@ typedef struct { /*! BIT30 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT30(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT30_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT30_MASK) @@ -44940,7 +44933,7 @@ typedef struct { /*! BIT31 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT31(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT31_SHIFT)) & TRDC_MBC_DOM2_MEM1_BLK_NSE_W_BIT31_MASK) @@ -44974,7 +44967,7 @@ typedef struct { /*! NSE0 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE0_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE0_MASK) @@ -44998,7 +44991,7 @@ typedef struct { /*! NSE1 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE1_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE1_MASK) @@ -45022,7 +45015,7 @@ typedef struct { /*! NSE2 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE2_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE2_MASK) @@ -45046,7 +45039,7 @@ typedef struct { /*! NSE3 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE3_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE3_MASK) @@ -45070,7 +45063,7 @@ typedef struct { /*! NSE4 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE4_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE4_MASK) @@ -45094,7 +45087,7 @@ typedef struct { /*! NSE5 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE5_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE5_MASK) @@ -45118,7 +45111,7 @@ typedef struct { /*! NSE6 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE6_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE6_MASK) @@ -45142,7 +45135,7 @@ typedef struct { /*! NSE7 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE7_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_CFG_W_NSE7_MASK) @@ -45162,7 +45155,7 @@ typedef struct { /*! BIT0 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT0_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT0_MASK) @@ -45172,7 +45165,7 @@ typedef struct { /*! BIT1 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT1_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT1_MASK) @@ -45182,7 +45175,7 @@ typedef struct { /*! BIT2 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT2_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT2_MASK) @@ -45192,7 +45185,7 @@ typedef struct { /*! BIT3 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT3_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT3_MASK) @@ -45202,7 +45195,7 @@ typedef struct { /*! BIT4 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT4_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT4_MASK) @@ -45212,7 +45205,7 @@ typedef struct { /*! BIT5 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT5_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT5_MASK) @@ -45222,7 +45215,7 @@ typedef struct { /*! BIT6 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT6_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT6_MASK) @@ -45232,7 +45225,7 @@ typedef struct { /*! BIT7 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT7_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT7_MASK) @@ -45242,7 +45235,7 @@ typedef struct { /*! BIT8 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT8(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT8_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT8_MASK) @@ -45252,7 +45245,7 @@ typedef struct { /*! BIT9 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT9(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT9_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT9_MASK) @@ -45262,7 +45255,7 @@ typedef struct { /*! BIT10 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT10(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT10_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT10_MASK) @@ -45272,7 +45265,7 @@ typedef struct { /*! BIT11 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT11(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT11_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT11_MASK) @@ -45282,7 +45275,7 @@ typedef struct { /*! BIT12 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT12(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT12_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT12_MASK) @@ -45292,7 +45285,7 @@ typedef struct { /*! BIT13 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT13(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT13_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT13_MASK) @@ -45302,7 +45295,7 @@ typedef struct { /*! BIT14 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT14(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT14_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT14_MASK) @@ -45312,7 +45305,7 @@ typedef struct { /*! BIT15 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT15(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT15_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT15_MASK) @@ -45322,7 +45315,7 @@ typedef struct { /*! BIT16 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT16(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT16_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT16_MASK) @@ -45332,7 +45325,7 @@ typedef struct { /*! BIT17 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT17(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT17_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT17_MASK) @@ -45342,7 +45335,7 @@ typedef struct { /*! BIT18 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT18(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT18_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT18_MASK) @@ -45352,7 +45345,7 @@ typedef struct { /*! BIT19 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT19(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT19_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT19_MASK) @@ -45362,7 +45355,7 @@ typedef struct { /*! BIT20 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT20(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT20_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT20_MASK) @@ -45372,7 +45365,7 @@ typedef struct { /*! BIT21 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT21(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT21_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT21_MASK) @@ -45382,7 +45375,7 @@ typedef struct { /*! BIT22 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT22(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT22_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT22_MASK) @@ -45392,7 +45385,7 @@ typedef struct { /*! BIT23 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT23(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT23_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT23_MASK) @@ -45402,7 +45395,7 @@ typedef struct { /*! BIT24 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT24(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT24_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT24_MASK) @@ -45412,7 +45405,7 @@ typedef struct { /*! BIT25 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT25(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT25_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT25_MASK) @@ -45422,7 +45415,7 @@ typedef struct { /*! BIT26 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT26(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT26_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT26_MASK) @@ -45432,7 +45425,7 @@ typedef struct { /*! BIT27 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT27(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT27_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT27_MASK) @@ -45442,7 +45435,7 @@ typedef struct { /*! BIT28 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT28(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT28_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT28_MASK) @@ -45452,7 +45445,7 @@ typedef struct { /*! BIT29 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT29(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT29_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT29_MASK) @@ -45462,7 +45455,7 @@ typedef struct { /*! BIT30 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT30(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT30_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT30_MASK) @@ -45472,7 +45465,7 @@ typedef struct { /*! BIT31 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT31(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT31_SHIFT)) & TRDC_MBC_DOM2_MEM2_BLK_NSE_W_BIT31_MASK) @@ -45506,7 +45499,7 @@ typedef struct { /*! NSE0 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE0_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE0_MASK) @@ -45530,7 +45523,7 @@ typedef struct { /*! NSE1 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE1_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE1_MASK) @@ -45554,7 +45547,7 @@ typedef struct { /*! NSE2 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE2_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE2_MASK) @@ -45578,7 +45571,7 @@ typedef struct { /*! NSE3 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE3_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE3_MASK) @@ -45602,7 +45595,7 @@ typedef struct { /*! NSE4 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE4_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE4_MASK) @@ -45626,7 +45619,7 @@ typedef struct { /*! NSE5 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE5_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE5_MASK) @@ -45650,7 +45643,7 @@ typedef struct { /*! NSE6 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE6_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE6_MASK) @@ -45674,7 +45667,7 @@ typedef struct { /*! NSE7 - NonSecure Enable for block B * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in this register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in this register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE7_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_CFG_W_NSE7_MASK) @@ -45694,7 +45687,7 @@ typedef struct { /*! BIT0 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT0_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT0_MASK) @@ -45704,7 +45697,7 @@ typedef struct { /*! BIT1 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT1_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT1_MASK) @@ -45714,7 +45707,7 @@ typedef struct { /*! BIT2 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT2_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT2_MASK) @@ -45724,7 +45717,7 @@ typedef struct { /*! BIT3 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT3_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT3_MASK) @@ -45734,7 +45727,7 @@ typedef struct { /*! BIT4 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT4_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT4_MASK) @@ -45744,7 +45737,7 @@ typedef struct { /*! BIT5 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT5_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT5_MASK) @@ -45754,7 +45747,7 @@ typedef struct { /*! BIT6 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT6_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT6_MASK) @@ -45764,7 +45757,7 @@ typedef struct { /*! BIT7 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT7_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT7_MASK) @@ -45774,7 +45767,7 @@ typedef struct { /*! BIT8 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT8(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT8_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT8_MASK) @@ -45784,7 +45777,7 @@ typedef struct { /*! BIT9 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT9(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT9_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT9_MASK) @@ -45794,7 +45787,7 @@ typedef struct { /*! BIT10 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT10(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT10_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT10_MASK) @@ -45804,7 +45797,7 @@ typedef struct { /*! BIT11 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT11(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT11_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT11_MASK) @@ -45814,7 +45807,7 @@ typedef struct { /*! BIT12 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT12(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT12_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT12_MASK) @@ -45824,7 +45817,7 @@ typedef struct { /*! BIT13 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT13(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT13_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT13_MASK) @@ -45834,7 +45827,7 @@ typedef struct { /*! BIT14 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT14(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT14_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT14_MASK) @@ -45844,7 +45837,7 @@ typedef struct { /*! BIT15 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT15(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT15_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT15_MASK) @@ -45854,7 +45847,7 @@ typedef struct { /*! BIT16 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT16(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT16_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT16_MASK) @@ -45864,7 +45857,7 @@ typedef struct { /*! BIT17 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT17(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT17_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT17_MASK) @@ -45874,7 +45867,7 @@ typedef struct { /*! BIT18 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT18(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT18_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT18_MASK) @@ -45884,7 +45877,7 @@ typedef struct { /*! BIT19 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT19(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT19_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT19_MASK) @@ -45894,7 +45887,7 @@ typedef struct { /*! BIT20 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT20(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT20_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT20_MASK) @@ -45904,7 +45897,7 @@ typedef struct { /*! BIT21 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT21(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT21_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT21_MASK) @@ -45914,7 +45907,7 @@ typedef struct { /*! BIT22 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT22(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT22_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT22_MASK) @@ -45924,7 +45917,7 @@ typedef struct { /*! BIT23 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT23(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT23_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT23_MASK) @@ -45934,7 +45927,7 @@ typedef struct { /*! BIT24 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT24(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT24_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT24_MASK) @@ -45944,7 +45937,7 @@ typedef struct { /*! BIT25 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT25(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT25_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT25_MASK) @@ -45954,7 +45947,7 @@ typedef struct { /*! BIT26 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT26(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT26_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT26_MASK) @@ -45964,7 +45957,7 @@ typedef struct { /*! BIT27 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT27(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT27_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT27_MASK) @@ -45974,7 +45967,7 @@ typedef struct { /*! BIT28 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT28(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT28_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT28_MASK) @@ -45984,7 +45977,7 @@ typedef struct { /*! BIT29 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT29(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT29_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT29_MASK) @@ -45994,7 +45987,7 @@ typedef struct { /*! BIT30 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT30(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT30_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT30_MASK) @@ -46004,7 +45997,7 @@ typedef struct { /*! BIT31 - Bit b NonSecure Enable [b = 0 - 31] * 0b0..Secure accesses to block B are based on corresponding MBACSEL field in register * (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]), nonsecure accesses to block B are not allowed. - * 0b1..Secure accesses to block B are are not allowed, nonsecure accesses to block B are based on corresponding + * 0b1..Secure accesses to block B are not allowed, nonsecure accesses to block B are based on corresponding * MBACSEL field in register (MBCm_DOMd_MEMs_BLK_CFG_Ww[MBACSEL]). */ #define TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT31(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT31_SHIFT)) & TRDC_MBC_DOM2_MEM3_BLK_NSE_W_BIT31_MASK) @@ -46223,7 +46216,7 @@ typedef struct { /*! NSE - NonSecure Enable * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in this register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in this register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM0_RGD_W_NSE(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM0_RGD_W_NSE_SHIFT)) & TRDC_MRC_DOM0_RGD_W_NSE_MASK) @@ -46258,7 +46251,7 @@ typedef struct { /*! BIT0 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM0_RGD_NSE_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM0_RGD_NSE_BIT0_SHIFT)) & TRDC_MRC_DOM0_RGD_NSE_BIT0_MASK) @@ -46268,7 +46261,7 @@ typedef struct { /*! BIT1 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM0_RGD_NSE_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM0_RGD_NSE_BIT1_SHIFT)) & TRDC_MRC_DOM0_RGD_NSE_BIT1_MASK) @@ -46278,7 +46271,7 @@ typedef struct { /*! BIT2 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM0_RGD_NSE_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM0_RGD_NSE_BIT2_SHIFT)) & TRDC_MRC_DOM0_RGD_NSE_BIT2_MASK) @@ -46288,7 +46281,7 @@ typedef struct { /*! BIT3 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM0_RGD_NSE_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM0_RGD_NSE_BIT3_SHIFT)) & TRDC_MRC_DOM0_RGD_NSE_BIT3_MASK) @@ -46298,7 +46291,7 @@ typedef struct { /*! BIT4 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM0_RGD_NSE_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM0_RGD_NSE_BIT4_SHIFT)) & TRDC_MRC_DOM0_RGD_NSE_BIT4_MASK) @@ -46308,7 +46301,7 @@ typedef struct { /*! BIT5 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM0_RGD_NSE_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM0_RGD_NSE_BIT5_SHIFT)) & TRDC_MRC_DOM0_RGD_NSE_BIT5_MASK) @@ -46318,7 +46311,7 @@ typedef struct { /*! BIT6 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM0_RGD_NSE_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM0_RGD_NSE_BIT6_SHIFT)) & TRDC_MRC_DOM0_RGD_NSE_BIT6_MASK) @@ -46328,7 +46321,7 @@ typedef struct { /*! BIT7 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM0_RGD_NSE_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM0_RGD_NSE_BIT7_SHIFT)) & TRDC_MRC_DOM0_RGD_NSE_BIT7_MASK) @@ -46365,7 +46358,7 @@ typedef struct { /*! NSE - NonSecure Enable * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in this register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in this register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM1_RGD_W_NSE(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM1_RGD_W_NSE_SHIFT)) & TRDC_MRC_DOM1_RGD_W_NSE_MASK) @@ -46400,7 +46393,7 @@ typedef struct { /*! BIT0 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM1_RGD_NSE_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM1_RGD_NSE_BIT0_SHIFT)) & TRDC_MRC_DOM1_RGD_NSE_BIT0_MASK) @@ -46410,7 +46403,7 @@ typedef struct { /*! BIT1 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM1_RGD_NSE_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM1_RGD_NSE_BIT1_SHIFT)) & TRDC_MRC_DOM1_RGD_NSE_BIT1_MASK) @@ -46420,7 +46413,7 @@ typedef struct { /*! BIT2 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM1_RGD_NSE_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM1_RGD_NSE_BIT2_SHIFT)) & TRDC_MRC_DOM1_RGD_NSE_BIT2_MASK) @@ -46430,7 +46423,7 @@ typedef struct { /*! BIT3 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM1_RGD_NSE_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM1_RGD_NSE_BIT3_SHIFT)) & TRDC_MRC_DOM1_RGD_NSE_BIT3_MASK) @@ -46440,7 +46433,7 @@ typedef struct { /*! BIT4 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM1_RGD_NSE_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM1_RGD_NSE_BIT4_SHIFT)) & TRDC_MRC_DOM1_RGD_NSE_BIT4_MASK) @@ -46450,7 +46443,7 @@ typedef struct { /*! BIT5 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM1_RGD_NSE_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM1_RGD_NSE_BIT5_SHIFT)) & TRDC_MRC_DOM1_RGD_NSE_BIT5_MASK) @@ -46460,7 +46453,7 @@ typedef struct { /*! BIT6 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM1_RGD_NSE_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM1_RGD_NSE_BIT6_SHIFT)) & TRDC_MRC_DOM1_RGD_NSE_BIT6_MASK) @@ -46470,7 +46463,7 @@ typedef struct { /*! BIT7 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM1_RGD_NSE_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM1_RGD_NSE_BIT7_SHIFT)) & TRDC_MRC_DOM1_RGD_NSE_BIT7_MASK) @@ -46507,7 +46500,7 @@ typedef struct { /*! NSE - NonSecure Enable * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in this register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in this register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM2_RGD_W_NSE(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM2_RGD_W_NSE_SHIFT)) & TRDC_MRC_DOM2_RGD_W_NSE_MASK) @@ -46542,7 +46535,7 @@ typedef struct { /*! BIT0 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM2_RGD_NSE_BIT0(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM2_RGD_NSE_BIT0_SHIFT)) & TRDC_MRC_DOM2_RGD_NSE_BIT0_MASK) @@ -46552,7 +46545,7 @@ typedef struct { /*! BIT1 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM2_RGD_NSE_BIT1(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM2_RGD_NSE_BIT1_SHIFT)) & TRDC_MRC_DOM2_RGD_NSE_BIT1_MASK) @@ -46562,7 +46555,7 @@ typedef struct { /*! BIT2 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM2_RGD_NSE_BIT2(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM2_RGD_NSE_BIT2_SHIFT)) & TRDC_MRC_DOM2_RGD_NSE_BIT2_MASK) @@ -46572,7 +46565,7 @@ typedef struct { /*! BIT3 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM2_RGD_NSE_BIT3(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM2_RGD_NSE_BIT3_SHIFT)) & TRDC_MRC_DOM2_RGD_NSE_BIT3_MASK) @@ -46582,7 +46575,7 @@ typedef struct { /*! BIT4 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM2_RGD_NSE_BIT4(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM2_RGD_NSE_BIT4_SHIFT)) & TRDC_MRC_DOM2_RGD_NSE_BIT4_MASK) @@ -46592,7 +46585,7 @@ typedef struct { /*! BIT5 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM2_RGD_NSE_BIT5(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM2_RGD_NSE_BIT5_SHIFT)) & TRDC_MRC_DOM2_RGD_NSE_BIT5_MASK) @@ -46602,7 +46595,7 @@ typedef struct { /*! BIT6 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM2_RGD_NSE_BIT6(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM2_RGD_NSE_BIT6_SHIFT)) & TRDC_MRC_DOM2_RGD_NSE_BIT6_MASK) @@ -46612,7 +46605,7 @@ typedef struct { /*! BIT7 - Bit n NonSecure Enable [n = 0 - 15] * 0b0..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on corresponding * MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). - * 0b1..Secure accesses to region r are are not allowed, nonsecure accesses to region r are based on + * 0b1..Secure accesses to region r are not allowed, nonsecure accesses to region r are based on * corresponding MRACSEL field in register (MRCm_DOMd_RGDr_Ww[MRACSEL]). */ #define TRDC_MRC_DOM2_RGD_NSE_BIT7(x) (((uint32_t)(((uint32_t)(x)) << TRDC_MRC_DOM2_RGD_NSE_BIT7_SHIFT)) & TRDC_MRC_DOM2_RGD_NSE_BIT7_MASK) @@ -46661,12 +46654,12 @@ typedef struct { #define MBC1_MEMORY_CFG_WORD_COUNT {1, 1, 1, 1} #define MBC2_MEMORY_CFG_WORD_COUNT {10, 1, 2, 0} #define MBC3_MEMORY_CFG_WORD_COUNT {0, 0, 0, 0} -#define MBC_MEMORY_CFG_WORD_COUNT {MBC0_MEMORY_CFG_WORD_COUNT , MBC1_MEMORY_CFG_WORD_COUNT, MBC2_MEMORY_CFG_WORD_COUNT, MBC3_MEMORY_CFG_WORD_COUNT} +#define MBC_MEMORY_CFG_WORD_COUNT {MBC0_MEMORY_CFG_WORD_COUNT, MBC1_MEMORY_CFG_WORD_COUNT, MBC2_MEMORY_CFG_WORD_COUNT, MBC3_MEMORY_CFG_WORD_COUNT} #define MBC0_MEMORY_NSE_WORD_COUNT {1, 1, 1, 1} #define MBC1_MEMORY_NSE_WORD_COUNT {1, 1, 1, 1} #define MBC2_MEMORY_NSE_WORD_COUNT {3, 1, 1, 0} #define MBC3_MEMORY_NSE_WORD_COUNT {0, 0, 0, 0} -#define MBC_MEMORY_NSE_WORD_COUNT {MBC0_MEMORY_NSE_WORD_COUNT , MBC1_MEMORY_NSE_WORD_COUNT, MBC2_MEMORY_NSE_WORD_COUNT, MBC3_MEMORY_NSE_WORD_COUNT} +#define MBC_MEMORY_NSE_WORD_COUNT {MBC0_MEMORY_NSE_WORD_COUNT, MBC1_MEMORY_NSE_WORD_COUNT, MBC2_MEMORY_NSE_WORD_COUNT, MBC3_MEMORY_NSE_WORD_COUNT} /*! @@ -59895,7 +59888,7 @@ typedef struct { #elif defined(__GNUC__) /* leave anonymous unions enabled */ #elif defined(__IAR_SYSTEMS_ICC__) - #pragma language=default + #pragma language = default #else #error Not supported compiler type #endif @@ -59925,14 +59918,14 @@ typedef struct { /** * @brief Mask and left-shift a bit field value for use in a register bit range. * @param field Name of the register bit field. - * @param value Value of the bit field. + * @param value of the bit field. * @return Masked and shifted value. */ #define NXP_VAL2FLD(field, value) (((value) << (field ## _SHIFT)) & (field ## _MASK)) /** * @brief Mask and right-shift a register value to extract a bit field value. * @param field Name of the register bit field. - * @param value Value of the register. + * @param value of the register. * @return Masked and shifted bit field value. */ #define NXP_FLD2VAL(field, value) (((value) & (field ## _MASK)) >> (field ## _SHIFT)) @@ -59958,8 +59951,7 @@ typedef struct { #define LTC0 LTC /*! @brief IMU message link between current CPU and remote peer CPU. */ -typedef enum -{ +typedef enum { kIMU_LinkCpu1Cpu2 = 0, /*! Message link between CPU1 and CPU2. */ kIMU_LinkMax /*! Message link count used for boundary check. */ } imu_link_t; @@ -59980,9 +59972,9 @@ typedef enum #define DEVICE_REVISION_A2 (0x12U) #define DEVICE_REVISION_OTHERS (0xFFU) -#define IS_CHIP_REVISION_A0() (DEVICE_REVISION_A0 == Chip_GetVersion()) -#define IS_CHIP_REVISION_A1() (DEVICE_REVISION_A1 == Chip_GetVersion()) -#define IS_CHIP_REVISION_A2() (DEVICE_REVISION_A2 == Chip_GetVersion()) +#define IS_CHIP_REVISION_A0() (Chip_GetVersion() == DEVICE_REVISION_A0) +#define IS_CHIP_REVISION_A1() (Chip_GetVersion() == DEVICE_REVISION_A1) +#define IS_CHIP_REVISION_A2() (Chip_GetVersion() == DEVICE_REVISION_A2) /*! * @brief Get the chip value. @@ -59995,32 +59987,27 @@ static inline uint8_t Chip_GetVersion(void) deviceRevision = (uint8_t)(*((uint8_t *)0x1480C000)) & 0xFFu; - if (DEVICE_REVISION_A0 == deviceRevision) /* A0 device revision is 0x10 */ + if (deviceRevision == DEVICE_REVISION_A0) /* A0 device revision is 0x10 */ { - return DEVICE_REVISION_A0; - } - else if (DEVICE_REVISION_A1 == deviceRevision) /* A1 device revision is 0x11 */ + return DEVICE_REVISION_A0; + } else if (DEVICE_REVISION_A1 == deviceRevision) /* A1 device revision is 0x11 */ { - if ((MSCM->SID & MSCM_SID_SIREV_MASK) == MSCM_SID_SIREV(0x2u)) /* A1 silicon revision is 0x2 */ - { - return DEVICE_REVISION_A1; - } - else if ((MSCM->SID & MSCM_SID_SIREV_MASK) == MSCM_SID_SIREV(0x1u)) /* A2 silicon revision is 0x1 */ - { - return DEVICE_REVISION_A2; - } - else if ((MSCM->SID & MSCM_SID_SIREV_MASK) == MSCM_SID_SIREV(0x3u)) /* Previous A1 silicon revision is 0x3 */ - { - return DEVICE_REVISION_A1; - } - else - { - return DEVICE_REVISION_OTHERS; - } - } - else + if ((MSCM->SID & MSCM_SID_SIREV_MASK) == MSCM_SID_SIREV(0x2u)) /* A1 silicon revision is 0x2 */ + { + return DEVICE_REVISION_A1; + } else if ((MSCM->SID & MSCM_SID_SIREV_MASK) == MSCM_SID_SIREV(0x1u)) /* A2 silicon revision is 0x1 */ + { + return DEVICE_REVISION_A2; + } else if ((MSCM->SID & MSCM_SID_SIREV_MASK) == MSCM_SID_SIREV(0x3u)) /* Previous A1 silicon revision is 0x3 */ + { + return DEVICE_REVISION_A1; + } else + { + return DEVICE_REVISION_OTHERS; + } + } else { - return DEVICE_REVISION_OTHERS; + return DEVICE_REVISION_OTHERS; } } diff --git a/mcux/mcux-sdk/devices/KW45B41Z83/KW45B41Z83_features.h b/mcux/mcux-sdk/devices/KW45B41Z83/KW45B41Z83_features.h index e488389a4..f6d4d0200 100644 --- a/mcux/mcux-sdk/devices/KW45B41Z83/KW45B41Z83_features.h +++ b/mcux/mcux-sdk/devices/KW45B41Z83/KW45B41Z83_features.h @@ -1,26 +1,24 @@ -/* -** ################################################################### -** Version: rev. 1.0, 2020-05-12 -** Build: b220804 -** -** Abstract: -** Chip specific module features. -** -** Copyright 2016 Freescale Semiconductor, Inc. -** Copyright 2016-2022 NXP -** All rights reserved. -** -** SPDX-License-Identifier: BSD-3-Clause -** -** http: www.nxp.com -** mail: support@nxp.com -** -** Revisions: -** - rev. 1.0 (2020-05-12) -** Initial version. -** -** ################################################################### -*/ +/* SPDX-License-Identifier: BSD-3-Clause + * ################################################################### + * Version: rev. 1.0, 2020-05-12 + * Build: b220804 + * + * Abstract: + * Chip specific module features. + * + * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2016-2022 NXP + * All rights reserved. + * + * http: www.nxp.com + * mail: support@nxp.com + * + * Revisions: + * - rev. 1.0 (2020-05-12) + * Initial version. + * + * ################################################################### + */ #ifndef _KW45B41Z83_FEATURES_H_ #define _KW45B41Z83_FEATURES_H_ @@ -497,22 +495,22 @@ /* @brief CTRL Has CUT_PIN_EN (bitfield CTRL[CUT_PIN_EN]). */ #define FSL_FEATURE_SFA_CTRL_HAS_CUT_PIN_ENn(x) \ - (((x) == SFA0) ? (1) : \ - (((x) == RF_SFA) ? (0) : (-1))) + (((x) == SFA0) ? (1) : \ + (((x) == RF_SFA) ? (0) : (-1))) /* @brief CTRL_EXT has CUT_PIN_EN (bitfield CTRL_EXT[CUT_PIN_EN]). */ #define FSL_FEATURE_SFA_CTRL_EXT_HAS_CUT_PIN_EN (0) /* @brief Trigger selection is configured outside the SFA peripheral. */ #define FSL_FEATURE_SFA_TRIGGER_SELECTION_OUTSIDEn(x) \ - (((x) == SFA0) ? (0) : \ - (((x) == RF_SFA) ? (1) : (-1))) + (((x) == SFA0) ? (0) : \ + (((x) == RF_SFA) ? (1) : (-1))) /* @brief SFA instance support trigger. */ #define FSL_FEATURE_SFA_INSTANCE_HAS_TRIGGERn(x) \ - (((x) == SFA0) ? (0) : \ - (((x) == RF_SFA) ? (1) : (-1))) + (((x) == SFA0) ? (0) : \ + (((x) == RF_SFA) ? (1) : (-1))) /* @brief SFA instance support interrupt. */ #define FSL_FEATURE_SFA_INSTANCE_HAS_INTERRUPTn(x) \ - (((x) == SFA0) ? (1) : \ - (((x) == RF_SFA) ? (0) : (-1))) + (((x) == SFA0) ? (1) : \ + (((x) == RF_SFA) ? (0) : (-1))) /* RTC module features */ @@ -578,9 +576,9 @@ /* @brief Number of channels. */ #define FSL_FEATURE_TPM_CHANNEL_COUNTn(x) \ - (((x) == TPM0) ? (6) : \ - (((x) == TPM1) ? (6) : \ - (((x) == TPM2) ? (2) : (-1)))) + (((x) == TPM0) ? (6) : \ + (((x) == TPM1) ? (6) : \ + (((x) == TPM2) ? (2) : (-1)))) /* @brief Has counter reset by the selected input capture event (register bits C0SC[ICRST], C1SC[ICRST], ...). */ #define FSL_FEATURE_TPM_HAS_COUNTER_RESET_BY_CAPTURE_EVENT (0) /* @brief Has TPM_PARAM. */ @@ -593,9 +591,9 @@ #define FSL_FEATURE_TPM_HAS_TRIG (1) /* @brief Whether TRIG register has effect. */ #define FSL_FEATURE_TPM_TRIG_HAS_EFFECTn(x) \ - (((x) == TPM0) ? (1) : \ - (((x) == TPM1) ? (1) : \ - (((x) == TPM2) ? (0) : (-1)))) + (((x) == TPM0) ? (1) : \ + (((x) == TPM1) ? (1) : \ + (((x) == TPM2) ? (0) : (-1)))) /* @brief Has counter pause on trigger. */ #define FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER (1) /* @brief Has external trigger selection. */ @@ -608,9 +606,9 @@ #define FSL_FEATURE_TPM_HAS_POL (1) /* @brief Whether POL register has effect. */ #define FSL_FEATURE_TPM_POL_HAS_EFFECTn(x) \ - (((x) == TPM0) ? (1) : \ - (((x) == TPM1) ? (1) : \ - (((x) == TPM2) ? (0) : (-1)))) + (((x) == TPM0) ? (1) : \ + (((x) == TPM1) ? (1) : \ + (((x) == TPM2) ? (0) : (-1)))) /* @brief Has TPM_FILTER register. */ #define FSL_FEATURE_TPM_HAS_FILTER (1) /* @brief Whether FILTER register has effect. */ @@ -619,9 +617,9 @@ #define FSL_FEATURE_TPM_HAS_QDCTRL (1) /* @brief Whether QDCTRL register has effect. */ #define FSL_FEATURE_TPM_QDCTRL_HAS_EFFECTn(x) \ - (((x) == TPM0) ? (1) : \ - (((x) == TPM1) ? (1) : \ - (((x) == TPM2) ? (0) : (-1)))) + (((x) == TPM0) ? (1) : \ + (((x) == TPM1) ? (1) : \ + (((x) == TPM2) ? (0) : (-1)))) /* @brief Has pause level select. */ #define FSL_FEATURE_TPM_HAS_PAUSE_LEVEL_SELECT (1) /* @brief Whether 32 bits counter has effect. */ diff --git a/mcux/mcux-sdk/devices/KW45B41Z83/fsl_device_registers.h b/mcux/mcux-sdk/devices/KW45B41Z83/fsl_device_registers.h index b7d03bec0..b540ed813 100644 --- a/mcux/mcux-sdk/devices/KW45B41Z83/fsl_device_registers.h +++ b/mcux/mcux-sdk/devices/KW45B41Z83/fsl_device_registers.h @@ -1,8 +1,6 @@ -/* +/* SPDX-License-Identifier: BSD-3-Clause * Copyright 2014-2016 Freescale Semiconductor, Inc. * Copyright 2016-2024 NXP - * SPDX-License-Identifier: BSD-3-Clause - * */ #ifndef __FSL_DEVICE_REGISTERS_H__ diff --git a/mcux/mcux-sdk/devices/KW45B41Z83/system_KW45B41Z83.c b/mcux/mcux-sdk/devices/KW45B41Z83/system_KW45B41Z83.c index 1e7b6f152..f1ca4dbeb 100644 --- a/mcux/mcux-sdk/devices/KW45B41Z83/system_KW45B41Z83.c +++ b/mcux/mcux-sdk/devices/KW45B41Z83/system_KW45B41Z83.c @@ -1,35 +1,35 @@ +// SPDX-License-Identifier: BSD-3-Clause /* -** ################################################################### -** Processors: KW45B41Z83AFPA -** KW45B41Z83AFTA -** -** Compilers: GNU C Compiler -** IAR ANSI C/C++ Compiler for ARM -** Keil ARM C/C++ Compiler -** MCUXpresso Compiler -** -** Reference manual: Rev. 7, 11/2022 -** Version: rev. 1.0, 2020-05-12 -** Build: b220810 -** -** Abstract: -** Provides a system configuration function and a global variable that -** contains the system frequency. It configures the device and initializes -** the oscillator (PLL) that is part of the microcontroller device. -** -** Copyright 2016 Freescale Semiconductor, Inc. -** Copyright 2016-2024 NXP -** SPDX-License-Identifier: BSD-3-Clause -** -** http: www.nxp.com -** mail: support@nxp.com -** -** Revisions: -** - rev. 1.0 (2020-05-12) -** Initial version. -** -** ################################################################### -*/ + * ################################################################### + * Processors: KW45B41Z83AFPA + * KW45B41Z83AFTA + * + * Compilers: GNU C Compiler + * IAR ANSI C/C++ Compiler for ARM + * Keil ARM C/C++ Compiler + * MCUXpresso Compiler + * + * Reference manual: Rev. 7, 11/2022 + * Version: rev. 1.0, 2020-05-12 + * Build: b220810 + * + * Abstract: + * Provides a system configuration function and a global variable that + * contains the system frequency. It configures the device and initializes + * the oscillator (PLL) that is part of the microcontroller device. + * + * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2016-2024 NXP + * + * http: www.nxp.com + * mail: support@nxp.com + * + * Revisions: + * - rev. 1.0 (2020-05-12) + * Initial version. + * + * ################################################################### + */ /*! * @file KW45B41Z83 @@ -58,126 +58,116 @@ #endif /* ---------------------------------------------------------------------------- - -- Core clock - ---------------------------------------------------------------------------- */ + * -- Core clock + * ---------------------------------------------------------------------------- + */ uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK; /* ---------------------------------------------------------------------------- - -- SystemInit() - ---------------------------------------------------------------------------- */ + * -- SystemInit() + * ---------------------------------------------------------------------------- + */ -__attribute__ ((weak)) void SystemInit (void) { +(void) +{ #if ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) - SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access in Secure mode */ - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - SCB_NS->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access in Non-secure mode */ - #endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access in Secure mode */ + #if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + SCB_NS->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access in Non-secure mode */ + #endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ #endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */ #if (DISABLE_WDOG) - while ((WDOG0->CS & WDOG_CS_RCS_MASK) != WDOG_CS_RCS_MASK) - { - } - - if ((WDOG0->CS & WDOG_CS_CMD32EN_MASK) != 0U) - { - WDOG0->CNT = 0xD928C520U; - } - else - { - WDOG0->CNT = 0xC520U; - WDOG0->CNT = 0xD928U; - } - - while ((WDOG0->CS & WDOG_CS_ULK_MASK) != WDOG_CS_ULK_MASK) - { - } - - WDOG0->TOVAL = 0xFFFF; - WDOG0->CS = (uint32_t) ((WDOG0->CS) & ~WDOG_CS_EN_MASK) | WDOG_CS_UPDATE_MASK; - - while ((WDOG0->CS & WDOG_CS_RCS_MASK) != WDOG_CS_RCS_MASK) - { - } + while ((WDOG0->CS & WDOG_CS_RCS_MASK) != WDOG_CS_RCS_MASK) + ; + + if ((WDOG0->CS & WDOG_CS_CMD32EN_MASK) != 0U) { + WDOG0->CNT = 0xD928C520U; + } else { + WDOG0->CNT = 0xC520U; + WDOG0->CNT = 0xD928U; + } + + while ((WDOG0->CS & WDOG_CS_ULK_MASK) != WDOG_CS_ULK_MASK) + ; + + WDOG0->TOVAL = 0xFFFF; + WDOG0->CS = (uint32_t) ((WDOG0->CS) & ~WDOG_CS_EN_MASK) | WDOG_CS_UPDATE_MASK; + + while ((WDOG0->CS & WDOG_CS_RCS_MASK) != WDOG_CS_RCS_MASK) + ; #endif /* (DISABLE_WDOG) */ #if defined(__MCUXPRESSO) - extern void(*const g_pfnVectors[]) (void); - SCB->VTOR = (uint32_t) &g_pfnVectors; + extern void(*const g_pfnVectors[]) (void); + SCB->VTOR = (uint32_t) &g_pfnVectors; #endif #if defined(USE_SMU2_AS_SYSTEM_MEMORY) - /* The SMU2 memory area in the default system memory map is configured as - * "device memory". This means that any unaligned access will fault, when - * driven from the CM33 core. Since we want to be able to use this as an - * extension to the system SRAM, remap it here as "memory" - * This is done by adding an entry to the MPU. This is done in 2 steps, as - * seen below. The 3rd step is to actually enable the MPU. - * - * Step 1: Add an entry in the MPU by setting the MPU_RNR register to select - * the position in the table, then by writing the MPU_RLAR & - * MPU_RBAR registers. For the RLAR, also set the Enable bit and the - * corresponding index in the MPU_MAIR0/1 registers. - */ - ARM_MPU_SetRegionEx(MPU, SMU2_MAIR_IDX, - SMU2_CM33_BASE_ADDR, - SMU2_CM33_END_ADDR | - (MPU_RLAR_EN_Msk << MPU_RLAR_EN_Pos) | - (SMU2_MAIR_IDX << MPU_RLAR_AttrIndx_Pos)); - /* - * Step 2: Set the attributes in the corresponding index in the MPU_MAIR - * registers (the index is the same index used when adding the entry in the - * MPU via the MPU_RNR register. - */ - ARM_MPU_SetMemAttrEx(MPU, - SMU2_MAIR_IDX, - ARM_MPU_ATTR(ARM_MPU_ATTR_NON_CACHEABLE, - ARM_MPU_ATTR_NON_CACHEABLE)); + /* The SMU2 memory area in the default system memory map is configured as + * "device memory". This means that any unaligned access will fault, when + * driven from the CM33 core. Since we want to be able to use this as an + * extension to the system SRAM, remap it here as "memory" + * This is done by adding an entry to the MPU. This is done in 2 steps, as + * seen below. The 3rd step is to actually enable the MPU. + * + * Step 1: Add an entry in the MPU by setting the MPU_RNR register to select + * the position in the table, then by writing the MPU_RLAR & + * MPU_RBAR registers. For the RLAR, also set the Enable bit and the + * corresponding index in the MPU_MAIR0/1 registers. + */ + ARM_MPU_SetRegionEx(MPU, SMU2_MAIR_IDX, SMU2_CM33_BASE_ADDR, + SMU2_CM33_END_ADDR | (MPU_RLAR_EN_Msk << MPU_RLAR_EN_Pos) | + (SMU2_MAIR_IDX << MPU_RLAR_AttrIndx_Pos)); + /* + * Step 2: Set the attributes in the corresponding index in the MPU_MAIR + * registers (the index is the same index used when adding the entry in the + * MPU via the MPU_RNR register. + */ + ARM_MPU_SetMemAttrEx(MPU, SMU2_MAIR_IDX, + ARM_MPU_ATTR(ARM_MPU_ATTR_NON_CACHEABLE, ARM_MPU_ATTR_NON_CACHEABLE)); #endif #if defined(USE_PB_RAM_AS_SYSTEM_MEMORY) - /* See Step 1 from USE_SMU2_AS_SYSTEM_MEMORY */ - ARM_MPU_SetRegionEx(MPU, PB_RAM_MAIR_IDX, - PB_RAM_CM33_BASE_ADDR, - PB_RAM_CM33_END_ADDR | - (MPU_RLAR_EN_Msk << MPU_RLAR_EN_Pos) | - (PB_RAM_MAIR_IDX << MPU_RLAR_AttrIndx_Pos)); - /* See Step 2 from USE_SMU2_AS_SYSTEM_MEMORY */ - ARM_MPU_SetMemAttrEx(MPU, - PB_RAM_MAIR_IDX, - ARM_MPU_ATTR(ARM_MPU_ATTR_NON_CACHEABLE, - ARM_MPU_ATTR_NON_CACHEABLE)); + /* See Step 1 from USE_SMU2_AS_SYSTEM_MEMORY */ + ARM_MPU_SetRegionEx(MPU, PB_RAM_MAIR_IDX, PB_RAM_CM33_BASE_ADDR, + PB_RAM_CM33_END_ADDR | (MPU_RLAR_EN_Msk << MPU_RLAR_EN_Pos) | + (PB_RAM_MAIR_IDX << MPU_RLAR_AttrIndx_Pos)); + /* See Step 2 from USE_SMU2_AS_SYSTEM_MEMORY */ + ARM_MPU_SetMemAttrEx(MPU, PB_RAM_MAIR_IDX, + ARM_MPU_ATTR(ARM_MPU_ATTR_NON_CACHEABLE, ARM_MPU_ATTR_NON_CACHEABLE)); #endif -#if defined(USE_SMU2_AS_SYSTEM_MEMORY) || \ - defined(USE_PB_RAM_AS_SYSTEM_MEMORY) - /* - * Step 3: Enable the MPU, and also enable default memory map for the - * privileged software. This is needed due to 2 reasons: - * 1. we run as privileged software (TZ secure mode) - * 2. we don't "rewrite" set all the necessary memory zones in the - * MPU; this means that once MPU is enabled, not even the - * code area will be available to the core, leading to the core - * hanging (no response to the read requests) - * - */ - ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk); +#if defined(USE_SMU2_AS_SYSTEM_MEMORY) || defined(USE_PB_RAM_AS_SYSTEM_MEMORY) + /* + * Step 3: Enable the MPU, and also enable default memory map for the + * privileged software. This is needed due to 2 reasons: + * 1. we run as privileged software (TZ secure mode) + * 2. we don't "rewrite" set all the necessary memory zones in the + * MPU; this means that once MPU is enabled, not even the + * code area will be available to the core, leading to the core + * hanging (no response to the read requests) + * + */ + ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk); #endif - SystemInitHook(); + SystemInitHook(); } /* ---------------------------------------------------------------------------- - -- SystemCoreClockUpdate() - ---------------------------------------------------------------------------- */ + * -- SystemCoreClockUpdate() + * ---------------------------------------------------------------------------- + */ -void SystemCoreClockUpdate (void) { +(void) { } /* ---------------------------------------------------------------------------- - -- SystemInitHook() - ---------------------------------------------------------------------------- */ + * -- SystemInitHook() + * ---------------------------------------------------------------------------- + */ -__attribute__ ((weak)) void SystemInitHook (void) { +(void) { /* Void implementation of the weak function. */ } diff --git a/mcux/mcux-sdk/devices/KW45B41Z83/system_KW45B41Z83.h b/mcux/mcux-sdk/devices/KW45B41Z83/system_KW45B41Z83.h index ff7aa79b5..0912828b4 100644 --- a/mcux/mcux-sdk/devices/KW45B41Z83/system_KW45B41Z83.h +++ b/mcux/mcux-sdk/devices/KW45B41Z83/system_KW45B41Z83.h @@ -1,37 +1,35 @@ -/* -** ################################################################### -** Processors: KW45B41Z83AFPA -** KW45B41Z83AFTA -** -** Compilers: GNU C Compiler -** IAR ANSI C/C++ Compiler for ARM -** Keil ARM C/C++ Compiler -** MCUXpresso Compiler -** -** Reference manual: Rev. 6, 05/22/2022 -** Version: rev. 1.0, 2020-05-12 -** Build: b220810 -** -** Abstract: -** Provides a system configuration function and a global variable that -** contains the system frequency. It configures the device and initializes -** the oscillator (PLL) that is part of the microcontroller device. -** -** Copyright 2016 Freescale Semiconductor, Inc. -** Copyright 2016-2022 NXP -** All rights reserved. -** -** SPDX-License-Identifier: BSD-3-Clause -** -** http: www.nxp.com -** mail: support@nxp.com -** -** Revisions: -** - rev. 1.0 (2020-05-12) -** Initial version. -** -** ################################################################### -*/ +/* SPDX-License-Identifier: BSD-3-Clause + * ################################################################### + * Processors: KW45B41Z83AFPA + * KW45B41Z83AFTA + * + * Compilers: GNU C Compiler + * IAR ANSI C/C++ Compiler for ARM + * Keil ARM C/C++ Compiler + * MCUXpresso Compiler + * + * Reference manual: Rev. 6, 05/22/2022 + * Version: rev. 1.0, 2020-05-12 + * Build: b220810 + * + * Abstract: + * Provides a system configuration function and a global variable that + * contains the system frequency. It configures the device and initializes + * the oscillator (PLL) that is part of the microcontroller device. + * + * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2016-2022 NXP + * All rights reserved. + * + * http: www.nxp.com + * mail: support@nxp.com + * + * Revisions: + * - rev. 1.0 (2020-05-12) + * Initial version. + * + * ################################################################### + */ /*! * @file KW45B41Z83 @@ -80,7 +78,7 @@ extern uint32_t SystemCoreClock; * microcontroller device. For systems with variable clock speed it also updates * the variable SystemCoreClock. SystemInit is called from startup_device file. */ -void SystemInit (void); +void SystemInit(void); /** * @brief Updates the SystemCoreClock variable. @@ -89,7 +87,7 @@ void SystemInit (void); * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates * the current core clock. */ -void SystemCoreClockUpdate (void); +void SystemCoreClockUpdate(void); /** * @brief SystemInit function hook. @@ -101,7 +99,7 @@ void SystemCoreClockUpdate (void); * NOTE: No global r/w variables can be used in this hook function because the * initialization of these variables happens after this function. */ -void SystemInitHook (void); +void SystemInitHook(void); #ifdef __cplusplus }