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coremark.patch
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coremark.patch
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diff --git a/sw/app/coremark/LICENSE.md b/sw/app/coremark/LICENSE.md
new file mode 100644
index 0000000..14e53e9
--- /dev/null
+++ b/sw/app/coremark/LICENSE.md
@@ -0,0 +1,100 @@
+# COREMARK® ACCEPTABLE USE AGREEMENT
+
+This ACCEPTABLE USE AGREEMENT (this “Agreement”) is offered by Embedded Microprocessor Benchmark Consortium, a California nonprofit corporation (“Licensor”), to users of its CoreMark® software (“Licensee”) exclusively on the following terms.
+
+Licensor offers benchmarking software (“Software”) pursuant to an open source license, but carefully controls use of its benchmarks and their associated goodwill. Licensor has registered its trademark in one of the benchmarks available through the Software, COREMARK, Ser. No. 85/487,290; Reg. No. 4,179,307 (the “Trademark”), and promotes the use of a standard metric as a benchmark for assessing the performance of embedded systems. Solely on the terms described herein, Licensee may use and display the Trademark in connection with the generation of data regarding measurement and analysis of computer and embedded system benchmarking via the Software (the “Licensed Use”).
+
+## Article 1 – License Grant.
+1.1. License. Subject to the terms and conditions of this Agreement, Licensor hereby grants to Licensee, and Licensee hereby accepts from Licensor, a personal, non-exclusive, royalty-free, revocable right and license to use and display the Trademark during the term of this Agreement (the “Term”), solely and exclusively in connection with the Licensed Use. During the Term, Licensee (i) shall not modify or otherwise create derivative works of the Trademark, and (ii) may use the Trademark only to the extent permitted under this License. Neither Licensee nor any affiliate or agent thereof shall otherwise use the Trademark without the prior express written consent of Licensor, which may be withheld in its sole and absolute discretion. All rights not expressly granted to Licensee hereunder shall remain the exclusive property of Licensor.
+
+1.2. Modifications to the Software. Licensee shall not use the Trademark in connection with any use of a modified, derivative, or otherwise altered copy of the Software.
+
+1.3. Licensor’s Use. Nothing in this Agreement shall preclude Licensor or any of its successors or assigns from using or permitting other entities to use the Trademark, whether or not such entity directly or indirectly competes or conflicts with Licensee’s Licensed Use in any manner.
+
+1.4. Term and Termination. This Agreement is perpetual unless terminated by either of the parties. Licensee may terminate this Agreement for convenience, without cause or liability, for any reason or for no reason whatsoever, upon ten (10) business days written notice. Licensor may terminate this Agreement effective immediately upon notice of breach. Upon termination, Licensee shall immediately remove all implementations of the Trademark from the Licensed Use, and delete all digitals files and records of all materials related to the Trademark.
+
+## Article 2 – Ownership.
+2.1. Ownership. Licensee acknowledges and agrees that Licensor is the owner of all right, title, and interest in and to the Trademark, and all such right, title, and interest shall remain with Licensor. Licensee shall not contest, dispute, challenge, oppose, or seek to cancel Licensor’s right, title, and interest in and to the Trademark. Licensee shall not prosecute any application for registration of the Trademark. Licensee shall display appropriate notices regarding ownership of the Trademark in connection with the Licensed Use.
+
+2.2. Goodwill. Licensee acknowledges that Licensee shall not acquire any right, title, or interest in the Trademark by virtue of this Agreement other than the license granted hereunder, and disclaims any such right, title, interest, or ownership. All goodwill and reputation generated by Licensee’s use of the Trademark shall inure to the exclusive benefit of Licensor. Licensee shall not by any act or omission use the Trademark in any manner that disparages or reflects adversely on Licensor or its Licensed Use or reputation. Licensee shall not take any action that would interfere with or prejudice Licensor’s ownership or registration of the Trademark, the validity of the Trademark or the validity of the license granted by this Agreement. If Licensor determines and notifies Licensee that any act taken in connection with the Licensed Use (i) is inaccurate, unlawful or offensive to good taste; (ii) fails to provide for proper trademark notices, or (iii) otherwise violates Licensee’s obligations under this Agreement, the license granted under this Agreement shall terminate.
+
+## Article 3 – Indemnification.
+3.1. Indemnification Generally. Licensee agrees to indemnify, defend, and hold harmless (collectively “indemnify” or “indemnification”) Licensor, including Licensor’s members, managers, officers, and employees (collectively “Related Persons”), from and against, and pay or reimburse Licensor and such Related Persons for, any and all third-party actions, claims, demands, proceedings, investigations, inquiries (collectively, “Claims”), and any and all liabilities, obligations, fines, deficiencies, costs, expenses, royalties, losses, and damages (including reasonable outside counsel fees and expenses) associated with such Claims, to the extent that such Claim arises out of (i) Licensee’s material breach of this Agreement, or (ii) any allegation(s) that Licensee’s actions infringe or violate any third-party intellectual property right, including without limitation, any U.S. copyright, patent, or trademark, or are otherwise found to be tortious or criminal (whether or not such indemnified person is a named party in a legal proceeding).
+
+3.2. Notice and Defense of Claims. Licensor shall promptly notify Licensee of any Claim for which indemnification is sought, following actual knowledge of such Claim, provided however that the failure to give such notice shall not relieve Licensee of its obligations hereunder except to the extent that Licensee is materially prejudiced by such failure. In the event that any third-party Claim is brought, Licensee shall have the right and option to undertake and control the defense of such action with counsel of its choice, provided however that (i) Licensor at its own expense may participate and appear on an equal footing with Licensee in the defense of any such Claim, (ii) Licensor may undertake and control such defense in the event of the material failure of Licensee to undertake and control the same; and (iii) the defense of any Claim relating to the intellectual property rights of Licensor or its licensors and any related counterclaims shall be solely controlled by Licensor with counsel of its choice. Licensee shall not consent to judgment or concede or settle or compromise any Claim without the prior written approval of Licensor (whose approval shall not be unreasonably withheld), unless such concession or settlement or compromise includes a full and unconditional release of Licensor and any applicable Related Persons from all liabilities in respect of such Claim.
+
+## Article 4 – Miscellaneous.
+4.1. Relationship of the Parties. This Agreement does not create a partnership, franchise, joint venture, agency, fiduciary, or employment relationship between the parties.
+
+4.2. No Third-Party Beneficiaries. Except for the rights of Related Persons under Article 3 (Indemnification), there are no third-party beneficiaries to this Agreement.
+
+4.3. Assignment. Licensee’s rights hereunder are non-assignable, and may not be sublicensed.
+
+4.4. Equitable Relief. Licensee acknowledges that the remedies available at law for any breach of this Agreement will, by their nature, be inadequate. Accordingly, Licensor may obtain injunctive relief or other equitable relief to restrain a breach or threatened breach of this Agreement or to specifically enforce this Agreement, without proving that any monetary damages have been sustained, and without the requirement of posting of a bond prior to obtaining such equitable relief.
+
+4.5. Governing Law. This Agreement will be interpreted, construed, and enforced in all respects in accordance with the laws of the State of California, without reference to its conflict of law principles.
+
+4.6. Attorneys’ Fees. If any legal action, arbitration or other proceeding is brought for the enforcement of this Agreement, or because of an alleged dispute, breach, default, or misrepresentation in connection with any of the provisions of this Agreement, the successful or prevailing party shall be entitled to recover its reasonable attorneys’ fees and other reasonable costs incurred in that action or proceeding, in addition to any other relief to which it may be entitled.
+
+4.7. Amendment; Waiver. This Agreement may not be amended, nor may any rights under it be waived, except in writing by Licensor.
+
+4.8. Severability. If any provision of this Agreement is held by a court of competent jurisdiction to be contrary to law, the provision shall be modified by the court and interpreted so as best to accomplish the objectives of the original provision to the fullest extent
+permitted by law, and the remaining provisions of this Agreement shall remain in effect.
+
+4.9. Entire Agreement. This Agreement constitutes the entire agreement between the parties and supersedes all prior and contemporaneous agreements, proposals or representations, written or oral, concerning its subject matter.
+
+
+# Apache License
+
+Version 2.0, January 2004
+
+http://www.apache.org/licenses/
+
+## TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+1. Definitions.
+
+"License" shall mean the terms and conditions for use, reproduction, and distribution as defined by Sections 1 through 9 of this document.
+
+"Licensor" shall mean the copyright owner or entity authorized by the copyright owner that is granting the License.
+
+"Legal Entity" shall mean the union of the acting entity and all other entities that control, are controlled by, or are under common control with that entity. For the purposes of this definition, "control" means (i) the power, direct or indirect, to cause the direction or management of such entity, whether by contract or otherwise, or (ii) ownership of fifty percent (50%) or more of the outstanding shares, or (iii) beneficial ownership of such entity.
+
+"You" (or "Your") shall mean an individual or Legal Entity exercising permissions granted by this License.
+
+"Source" form shall mean the preferred form for making modifications, including but not limited to software source code, documentation source, and configuration files.
+
+"Object" form shall mean any form resulting from mechanical transformation or translation of a Source form, including but not limited to compiled object code, generated documentation, and conversions to other media types.
+
+"Work" shall mean the work of authorship, whether in Source or Object form, made available under the License, as indicated by a copyright notice that is included in or attached to the work (an example is provided in the Appendix below).
+
+"Derivative Works" shall mean any work, whether in Source or Object form, that is based on (or derived from) the Work and for which the editorial revisions, annotations, elaborations, or other modifications represent, as a whole, an original work of authorship. For the purposes of this License, Derivative Works shall not include works that remain separable from, or merely link (or bind by name) to the interfaces of, the Work and Derivative Works thereof.
+
+"Contribution" shall mean any work of authorship, including the original version of the Work and any modifications or additions to that Work or Derivative Works thereof, that is intentionally submitted to Licensor for inclusion in the Work by the copyright owner or by an individual or Legal Entity authorized to submit on behalf of the copyright owner. For the purposes of this definition, "submitted" means any form of electronic, verbal, or written communication sent to the Licensor or its representatives, including but not limited to communication on electronic mailing lists, source code control systems, and issue tracking systems that are managed by, or on behalf of, the Licensor for the purpose of discussing and improving the Work, but excluding communication that is conspicuously marked or otherwise designated in writing by the copyright owner as "Not a Contribution."
+
+"Contributor" shall mean Licensor and any individual or Legal Entity on behalf of whom a Contribution has been received by Licensor and subsequently incorporated within the Work.
+
+2. Grant of Copyright License. Subject to the terms and conditions of this License, each Contributor hereby grants to You a perpetual, worldwide, non-exclusive, no-charge, royalty-free, irrevocable copyright license to reproduce, prepare Derivative Works of, publicly display, publicly perform, sublicense, and distribute the Work and such Derivative Works in Source or Object form.
+
+3. Grant of Patent License. Subject to the terms and conditions of this License, each Contributor hereby grants to You a perpetual, worldwide, non-exclusive, no-charge, royalty-free, irrevocable (except as stated in this section) patent license to make, have made, use, offer to sell, sell, import, and otherwise transfer the Work, where such license applies only to those patent claims licensable by such Contributor that are necessarily infringed by their Contribution(s) alone or by combination of their Contribution(s) with the Work to which such Contribution(s) was submitted. If You institute patent litigation against any entity (including a cross-claim or counterclaim in a lawsuit) alleging that the Work or a Contribution incorporated within the Work constitutes direct or contributory patent infringement, then any patent licenses granted to You under this License for that Work shall terminate as of the date such litigation is filed.
+
+4. Redistribution. You may reproduce and distribute copies of the Work or Derivative Works thereof in any medium, with or without modifications, and in Source or Object form, provided that You meet the following conditions:
+
+ You must give any other recipients of the Work or Derivative Works a copy of this License; and
+ You must cause any modified files to carry prominent notices stating that You changed the files; and
+ You must retain, in the Source form of any Derivative Works that You distribute, all copyright, patent, trademark, and attribution notices from the Source form of the Work, excluding those notices that do not pertain to any part of the Derivative Works; and
+ If the Work includes a "NOTICE" text file as part of its distribution, then any Derivative Works that You distribute must include a readable copy of the attribution notices contained within such NOTICE file, excluding those notices that do not pertain to any part of the Derivative Works, in at least one of the following places: within a NOTICE text file distributed as part of the Derivative Works; within the Source form or documentation, if provided along with the Derivative Works; or, within a display generated by the Derivative Works, if and wherever such third-party notices normally appear. The contents of the NOTICE file are for informational purposes only and do not modify the License. You may add Your own attribution notices within Derivative Works that You distribute, alongside or as an addendum to the NOTICE text from the Work, provided that such additional attribution notices cannot be construed as modifying the License.
+
+ You may add Your own copyright statement to Your modifications and may provide additional or different license terms and conditions for use, reproduction, or distribution of Your modifications, or for any such Derivative Works as a whole, provided Your use, reproduction, and distribution of the Work otherwise complies with the conditions stated in this License.
+
+5. Submission of Contributions. Unless You explicitly state otherwise, any Contribution intentionally submitted for inclusion in the Work by You to the Licensor shall be under the terms and conditions of this License, without any additional terms or conditions. Notwithstanding the above, nothing herein shall supersede or modify the terms of any separate license agreement you may have executed with Licensor regarding such Contributions.
+
+6. Trademarks. This License does not grant permission to use the trade names, trademarks, service marks, or product names of the Licensor, except as required for reasonable and customary use in describing the origin of the Work and reproducing the content of the NOTICE file.
+
+7. Disclaimer of Warranty. Unless required by applicable law or agreed to in writing, Licensor provides the Work (and each Contributor provides its Contributions) on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied, including, without limitation, any warranties or conditions of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A PARTICULAR PURPOSE. You are solely responsible for determining the appropriateness of using or redistributing the Work and assume any risks associated with Your exercise of permissions under this License.
+
+8. Limitation of Liability. In no event and under no legal theory, whether in tort (including negligence), contract, or otherwise, unless required by applicable law (such as deliberate and grossly negligent acts) or agreed to in writing, shall any Contributor be liable to You for damages, including any direct, indirect, special, incidental, or consequential damages of any character arising as a result of this License or out of the use or inability to use the Work (including but not limited to damages for loss of goodwill, work stoppage, computer failure or malfunction, or any and all other commercial damages or losses), even if such Contributor has been advised of the possibility of such damages.
+
+9. Accepting Warranty or Additional Liability. While redistributing the Work or Derivative Works thereof, You may choose to offer, and charge a fee for, acceptance of support, warranty, indemnity, or other liability obligations and/or rights consistent with this License. However, in accepting such obligations, You may act only on Your own behalf and on Your sole responsibility, not on behalf of any other Contributor, and only if You agree to indemnify, defend, and hold each Contributor harmless for any liability incurred by, or claims asserted against, such Contributor by reason of your accepting any such warranty or additional liability.
+
+END OF TERMS AND CONDITIONS
diff --git a/sw/app/coremark/Makefile b/sw/app/coremark/Makefile
new file mode 100644
index 0000000..5f90912
--- /dev/null
+++ b/sw/app/coremark/Makefile
@@ -0,0 +1,139 @@
+# Copyright 2018 Embedded Microprocessor Benchmark Consortium (EEMBC)
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# Original Author: Shay Gal-on
+
+# Make sure the default target is to simply build and run the benchmark.
+RSTAMP = v1.0
+
+.PHONY: run score
+run: $(OUTFILE) rerun score
+
+score:
+ @echo "Check run1.log and run2.log for results."
+ @echo "See README.md for run and reporting rules."
+
+ifndef PORT_DIR
+# Ports for a couple of common self hosted platforms
+UNAME=$(shell if command -v uname 2> /dev/null; then uname ; fi)
+ifneq (,$(findstring CYGWIN,$(UNAME)))
+PORT_DIR=cygwin
+endif
+ifneq (,$(findstring Linux,$(UNAME)))
+MACHINE=$(shell uname -m)
+ifneq (,$(findstring 64,$(MACHINE)))
+PORT_DIR=linux64
+else
+PORT_DIR=linux
+endif
+endif
+endif
+ifndef PORT_DIR
+$(error PLEASE define PORT_DIR! (e.g. make PORT_DIR=simple))
+endif
+vpath %.c $(PORT_DIR)
+vpath %.h $(PORT_DIR)
+vpath %.mak $(PORT_DIR)
+include $(PORT_DIR)/core_portme.mak
+
+ifndef ITERATIONS
+ITERATIONS=0
+endif
+ifdef REBUILD
+FORCE_REBUILD=force_rebuild
+endif
+
+CFLAGS += -DITERATIONS=$(ITERATIONS)
+
+CORE_FILES = core_list_join core_main core_matrix core_state core_util
+ORIG_SRCS = $(addsuffix .c,$(CORE_FILES))
+SRCS = $(ORIG_SRCS) $(PORT_SRCS)
+OBJS = $(addprefix $(OPATH),$(addsuffix $(OEXT),$(CORE_FILES)) $(PORT_OBJS))
+OUTNAME = coremark$(EXE)
+OUTFILE = $(OPATH)$(OUTNAME)
+LOUTCMD = $(OFLAG) $(OUTFILE) $(LFLAGS_END)
+OUTCMD = $(OUTFLAG) $(OUTFILE) $(LFLAGS_END)
+
+HEADERS = coremark.h
+CHECK_FILES = $(ORIG_SRCS) $(HEADERS)
+
+$(OPATH):
+ $(MKDIR) $(OPATH)
+
+.PHONY: compile link
+ifdef SEPARATE_COMPILE
+$(OPATH)$(PORT_DIR):
+ $(MKDIR) $(OPATH)$(PORT_DIR)
+
+compile: $(OPATH) $(OPATH)$(PORT_DIR) $(OBJS) $(HEADERS)
+link: compile
+ $(LD) $(LFLAGS) $(XLFLAGS) $(OBJS) $(LOUTCMD)
+
+else
+
+compile: $(OPATH) $(SRCS) $(HEADERS)
+ $(CC) $(CFLAGS) $(XCFLAGS) $(SRCS) $(OUTCMD)
+link: compile
+ @echo "Link performed along with compile"
+
+endif
+
+$(OUTFILE): $(SRCS) $(HEADERS) Makefile core_portme.mak $(FORCE_REBUILD)
+ $(MAKE) port_prebuild
+ $(MAKE) link
+ $(MAKE) port_postbuild
+
+.PHONY: rerun
+rerun:
+ $(MAKE) XCFLAGS="$(XCFLAGS) -DPERFORMANCE_RUN=1" load run1.log
+ $(MAKE) XCFLAGS="$(XCFLAGS) -DVALIDATION_RUN=1" load run2.log
+
+PARAM1=$(PORT_PARAMS) 0x0 0x0 0x66 $(ITERATIONS)
+PARAM2=$(PORT_PARAMS) 0x3415 0x3415 0x66 $(ITERATIONS)
+PARAM3=$(PORT_PARAMS) 8 8 8 $(ITERATIONS)
+
+run1.log-PARAM=$(PARAM1) 7 1 2000
+run2.log-PARAM=$(PARAM2) 7 1 2000
+run3.log-PARAM=$(PARAM3) 7 1 1200
+
+run1.log run2.log run3.log: load
+ $(MAKE) port_prerun
+ $(RUN) $(OUTFILE) $($(@)-PARAM) > $(OPATH)$@
+ $(MAKE) port_postrun
+
+.PHONY: gen_pgo_data
+gen_pgo_data: run3.log
+
+.PHONY: load
+load: $(OUTFILE)
+ $(MAKE) port_preload
+ $(LOAD) $(OUTFILE)
+ $(MAKE) port_postload
+
+.PHONY: clean
+clean:
+ rm -f $(OUTFILE) $(OPATH)*.log *.info $(OPATH)index.html $(PORT_CLEAN)
+
+.PHONY: force_rebuild
+force_rebuild:
+ echo "Forcing Rebuild"
+
+.PHONY: check
+check:
+ md5sum -c coremark.md5
+
+ifdef ETC
+# Targets related to testing and releasing CoreMark. Not part of the general release!
+include Makefile.internal
+endif
diff --git a/sw/app/coremark/README.md b/sw/app/coremark/README.md
new file mode 100644
index 0000000..6e00041
--- /dev/null
+++ b/sw/app/coremark/README.md
@@ -0,0 +1,396 @@
+
+# Introduction
+
+CoreMark's primary goals are simplicity and providing a method for testing only a processor's core features. For more information about EEMBC's comprehensive embedded benchmark suites, please see www.eembc.org.
+
+For a more compute-intensive version of CoreMark that uses larger datasets and execution loops taken from common applications, please check out EEMBC's [CoreMark-PRO](https://www.github.com/eembc/coremark-pro) benchmark, also on GitHub.
+
+# Building and Running
+
+To build and run the benchmark, type
+
+`> make`
+
+Full results are available in the files `run1.log` and `run2.log`. CoreMark result can be found in `run1.log`.
+
+## Cross Compiling
+
+For cross compile platforms please adjust `core_portme.mak`, `core_portme.h` (and possibly `core_portme.c`) according to the specific platform used. When porting to a new platform, it is recommended to copy one of the default port folders (e.g. `mkdir <platform> && cp linux/* <platform>`), adjust the porting files, and run:
+~~~
+% make PORT_DIR=<platform>
+~~~
+
+## Make Targets
+`run` - Default target, creates `run1.log` and `run2.log`.
+`run1.log` - Run the benchmark with performance parameters, and output to `run1.log`
+`run2.log` - Run the benchmark with validation parameters, and output to `run2.log`
+`run3.log` - Run the benchmark with profile generation parameters, and output to `run3.log`
+`compile` - compile the benchmark executable
+`link` - link the benchmark executable
+`check` - test MD5 of sources that may not be modified
+`clean` - clean temporary files
+
+### Make flag: `ITERATIONS`
+By default, the benchmark will run between 10-100 seconds. To override, use `ITERATIONS=N`
+~~~
+% make ITERATIONS=10
+~~~
+Will run the benchmark for 10 iterations. It is recommended to set a specific number of iterations in certain situations e.g.:
+
+* Running with a simulator
+* Measuring power/energy
+* Timing cannot be restarted
+
+Minimum required run time: **Results are only valid for reporting if the benchmark ran for at least 10 secs!**
+
+### Make flag: `XCFLAGS`
+To add compiler flags from the command line, use `XCFLAGS` e.g.:
+
+~~~
+% make XCFLAGS="-g -DMULTITHREAD=4 -DUSE_FORK=1"
+~~~
+
+### Make flag: `CORE_DEBUG`
+
+Define to compile for a debug run if you get incorrect CRC.
+
+~~~
+% make XCFLAGS="-DCORE_DEBUG=1"
+~~~
+
+### Make flag: `REBUILD`
+
+Force a rebuild of the executable.
+
+## Systems Without `make`
+The following files need to be compiled:
+* `core_list_join.c`
+* `core_main.c`
+* `core_matrix.c`
+* `core_state.c`
+* `core_util.c`
+* `PORT_DIR/core_portme.c`
+
+For example:
+~~~
+% gcc -O2 -o coremark.exe core_list_join.c core_main.c core_matrix.c core_state.c core_util.c simple/core_portme.c -DPERFORMANCE_RUN=1 -DITERATIONS=1000
+% ./coremark.exe > run1.log
+~~~
+The above will compile the benchmark for a performance run and 1000 iterations. Output is redirected to `run1.log`.
+
+# Parallel Execution
+Use `XCFLAGS=-DMULTITHREAD=N` where N is number of threads to run in parallel. Several implementations are available to execute in multiple contexts, or you can implement your own in `core_portme.c`.
+
+~~~
+% make XCFLAGS="-DMULTITHREAD=4 -DUSE_PTHREAD"
+~~~
+
+Above will compile the benchmark for execution on 4 cores, using POSIX Threads API.
+
+# Run Parameters for the Benchmark Executable
+CoreMark's executable takes several parameters as follows (but only if `main()` accepts arguments):
+1st - A seed value used for initialization of data.
+2nd - A seed value used for initialization of data.
+3rd - A seed value used for initialization of data.
+4th - Number of iterations (0 for auto : default value)
+5th - Reserved for internal use.
+6th - Reserved for internal use.
+7th - For malloc users only, ovreride the size of the input data buffer.
+
+The run target from make will run coremark with 2 different data initialization seeds.
+
+## Alternative parameters:
+If not using `malloc` or command line arguments are not supported, the buffer size
+for the algorithms must be defined via the compiler define `TOTAL_DATA_SIZE`.
+`TOTAL_DATA_SIZE` must be set to 2000 bytes (default) for standard runs.
+The default for such a target when testing different configurations could be:
+
+~~~
+% make XCFLAGS="-DTOTAL_DATA_SIZE=6000 -DMAIN_HAS_NOARGC=1"
+~~~
+
+# Submitting Results
+
+CoreMark results can be submitted on the web. Open a web browser and go to the [submission page](https://www.eembc.org/coremark/submit.php). After registering an account you may enter a score.
+
+# Run Rules
+What is and is not allowed.
+
+## Required
+1. The benchmark needs to run for at least 10 seconds.
+2. All validation must succeed for seeds `0,0,0x66` and `0x3415,0x3415,0x66`, buffer size of 2000 bytes total.
+ * If not using command line arguments to main:
+~~~
+ % make XCFLAGS="-DPERFORMANCE_RUN=1" REBUILD=1 run1.log
+ % make XCFLAGS="-DVALIDATION_RUN=1" REBUILD=1 run2.log
+~~~
+3. If using profile guided optimization, profile must be generated using seeds of `8,8,8`, and buffer size of 1200 bytes total.
+~~~
+ % make XCFLAGS="-DTOTAL_DATA_SIZE=1200 -DPROFILE_RUN=1" REBUILD=1 run3.log
+~~~
+4. All source files must be compiled with the same flags.
+5. All data type sizes must match size in bits such that:
+ * `ee_u8` is an unsigned 8-bit datatype.
+ * `ee_s16` is a signed 16-bit datatype.
+ * `ee_u16` is an unsigned 16-bit datatype.
+ * `ee_s32` is a signed 32-bit datatype.
+ * `ee_u32` is an unsigned 32-bit datatype.
+
+## Allowed
+
+1. Changing number of iterations
+2. Changing toolchain and build/load/run options
+3. Changing method of acquiring a data memory block
+5. Changing the method of acquiring seed values
+6. Changing implementation `in core_portme.c`
+7. Changing configuration values in `core_portme.h`
+8. Changing `core_portme.mak`
+
+## NOT ALLOWED
+1. Changing of source file other then `core_portme*` (use `make check` to validate)
+
+# Reporting rules
+Use the following syntax to report results on a data sheet:
+
+CoreMark 1.0 : N / C [/ P] [/ M]
+
+N - Number of iterations per second with seeds 0,0,0x66,size=2000)
+
+C - Compiler version and flags
+
+P - Parameters such as data and code allocation specifics
+
+* This parameter *may* be omitted if all data was allocated on the heap in RAM.
+* This parameter *may not* be omitted when reporting CoreMark/MHz
+
+M - Type of parallel execution (if used) and number of contexts
+* This parameter may be omitted if parallel execution was not used.
+
+e.g.:
+
+~~~
+CoreMark 1.0 : 128 / GCC 4.1.2 -O2 -fprofile-use / Heap in TCRAM / FORK:2
+~~~
+or
+~~~
+CoreMark 1.0 : 1400 / GCC 3.4 -O4
+~~~
+
+If reporting scaling results, the results must be reported as follows:
+
+CoreMark/MHz 1.0 : N / C / P [/ M]
+
+P - When reporting scaling results, memory parameter must also indicate memory frequency:core frequency ratio.
+1. If the core has cache and cache frequency to core frequency ratio is configurable, that must also be included.
+
+e.g.:
+
+~~~
+CoreMark/MHz 1.0 : 1.47 / GCC 4.1.2 -O2 / DDR3(Heap) 30:1 Memory 1:1 Cache
+~~~
+
+# Log File Format
+The log files have the following format
+
+~~~
+2K performance run parameters for coremark. (Run type)
+CoreMark Size : 666 (Buffer size)
+Total ticks : 25875 (platform dependent value)
+Total time (secs) : 25.875000 (actual time in seconds)
+Iterations/Sec : 3864.734300 (Performance value to report)
+Iterations : 100000 (number of iterations used)
+Compiler version : GCC3.4.4 (Compiler and version)
+Compiler flags : -O2 (Compiler and linker flags)
+Memory location : Code in flash, data in on chip RAM
+seedcrc : 0xe9f5 (identifier for the input seeds)
+[0]crclist : 0xe714 (validation for list part)
+[0]crcmatrix : 0x1fd7 (validation for matrix part)
+[0]crcstate : 0x8e3a (validation for state part)
+[0]crcfinal : 0x33ff (iteration dependent output)
+Correct operation validated. See README.md for run and reporting rules. (*Only when run is successful*)
+CoreMark 1.0 : 6508.490622 / GCC3.4.4 -O2 / Heap (*Only on a successful performance run*)
+~~~
+
+# Theory of Operation
+
+This section describes the initial goals of CoreMark and their implementation.
+
+## Small and easy to understand
+
+* X number of source code lines for timed portion of the benchmark.
+* Meaningful names for variables and functions.
+* Comments for each block of code more than 10 lines long.
+
+## Portability
+
+A thin abstraction layer will be provided for I/O and timing in a separate file. All I/O and timing of the benchmark will be done through this layer.
+
+### Code / data size
+
+* Compile with gcc on x86 and make sure all sizes are according to requirements.
+* If dynamic memory allocation is used, take total memory allocated into account as well.
+* Avoid recursive functions and keep track of stack usage.
+* Use the same memory block as data site for all algorithms, and initialize the data before each algorithm – while this means that initialization with data happens during the timed portion, it will only happen once during the timed portion and so have negligible effect on the results.
+
+## Controlled output
+
+This may be the most difficult goal. Compilers are constantly improving and getting better at analyzing code. To create work that cannot be computed at compile time and must be computed at run time, we will rely on two assumptions:
+
+* Some system functions (e.g. time, scanf) and parameters cannot be computed at compile time. In most cases, marking a variable volatile means the compiler is force to read this variable every time it is read. This will be used to introduce a factor into the input that cannot be precomputed at compile time. Since the results are input dependent, that will make sure that computation has to happen at run time.
+
+* Either a system function or I/O (e.g. scanf) or command line parameters or volatile variables will be used before the timed portion to generate data which is not available at compile time. Specific method used is not relevant as long as it can be controlled, and that it cannot be computed or eliminated by the compiler at compile time. E.g. if the clock() functions is a compiler stub, it may not be used. The derived values will be reported on the output so that verification can be done on a different machine.
+
+* We cannot rely on command line parameters since some embedded systems do not have the capability to provide command line parameters. All 3 methods above will be implemented (time based, scanf and command line parameters) and all 3 are valid if the compiler cannot determine the value at compile time.
+
+* It is important to note that The actual values that are to be supplied at run time will be standardized. The methodology is not intended to provide random data, but simply to provide controlled data that cannot be precomputed at compile time.
+
+* Printed results must be valid at run time. This will be used to make sure the computation has been executed.
+
+* Some embedded systems do not provide “printf” or other I/O functionality. All I/O will be done through a thin abstraction interface to allow execution on such systems (e.g. allow output via JTAG).
+
+## Key Algorithms
+
+### Linked List
+
+The following linked list structure will be used:
+
+~~~
+typedef struct list_data_s {
+ ee_s16 data16;
+ ee_s16 idx;
+} list_data;
+
+typedef struct list_head_s {
+ struct list_head_s *next;
+ struct list_data_s *info;
+} list_head;
+~~~
+
+While adding a level of indirection accessing the data, this structure is realistic and used in many embedded applications for small to medium lists.
+
+The list itself will be initialized on a block of memory that will be passed in to the initialization function. While in general linked lists use malloc for new nodes, embedded applications sometime control the memory for small data structures such as arrays and lists directly to avoid the overhead of system calls, so this approach is realistic.
+
+The linked list will be initialized such that 1/4 of the list pointers point to sequential areas in memory, and 3/4 of the list pointers are distributed in a non sequential manner. This is done to emulate a linked list that had add/remove happen for a while disrupting the neat order, and then a series of adds that are likely to come from sequential memory locations.
+
+For the benchmark itself:
+- Multiple find operations are going to be performed. These find operations may result in the whole list being traversed. The result of each find will become part of the output chain.
+- The list will be sorted using merge sort based on the data16 value, and then derive CRC of the data16 item in order for part of the list. The CRC will become part of the output chain.
+- The list will be sorted again using merge sort based on the idx value. This sort will guarantee that the list is returned to the primary state before leaving the function, so that multiple iterations of the function will have the same result. CRC of the data16 for part of the list will again be calculated and become part of the output chain.
+
+The actual `data16` in each cell will be pseudo random based on a single 16b input that cannot be determined at compile time. In addition, the part of the list which is used for CRC will also be passed to the function, and determined based on an input that cannot be determined at run time.
+
+### Matrix Multiply
+
+This very simple algorithm forms the basis of many more complex algorithms. The tight inner loop is the focus of many optimizations (compiler as well as hardware based) and is thus relevant for embedded processing.
+
+The total available data space will be divided to 3 parts:
+1. NxN matrix A.
+2. NxN matrix B.
+3. NxN matrix C.
+
+E.g. for 2K we will have 3 12x12 matrices (assuming data type of 32b 12(len)*12(wid)*4(size)*3(num) =1728 bytes).
+
+Matrix A will be initialized with small values (upper 3/4 of the bits all zero).
+Matrix B will be initialized with medium values (upper half of the bits all zero).
+Matrix C will be used for the result.
+
+For the benchmark itself:
+- Multiple A by a constant into C, add the upper bits of each of the values in the result matrix. The result will become part of the output chain.
+- Multiple A by column X of B into C, add the upper bits of each of the values in the result matrix. The result will become part of the output chain.
+- Multiple A by B into C, add the upper bits of each of the values in the result matrix. The result will become part of the output chain.
+
+The actual values for A and B must be derived based on input that is not available at compile time.
+
+### State Machine
+
+This part of the code needs to exercise switch and if statements. As such, we will use a small Moore state machine. In particular, this will be a state machine that identifies string input as numbers and divides them according to format.
+
+The state machine will parse the input string until either a “,” separator or end of input is encountered. An invalid number will cause the state machine to return invalid state and a valid number will cause the state machine to return with type of number format (int/float/scientific).
+
+This code will perform a realistic task, be small enough to easily understand, and exercise the required functionality. The other option used in embedded systems is a mealy based state machine, which is driven by a table. The table then determines the number of states and complexity of transitions. This approach, however, tests mainly the load/store and function call mechanisms and less the handling of branches. If analysis of the final results shows that the load/store functionality of the processor is not exercised thoroughly, it may be a good addition to the benchmark (codesize allowing).
+
+For input, the memory block will be initialized with comma separated values of mixed formats, as well as invalid inputs.
+
+For the benchmark itself:
+- Invoke the state machine on all of the input and count final states and state transitions. CRC of all final states and transitions will become part of the output chain.
+- Modify the input at intervals (inject errors) and repeat the state machine operation.
+- Modify the input back to original form.
+
+The actual input must be initialized based on data that cannot be determined at compile time. In addition the intervals for modification of the input and the actual modification must be based on input that cannot be determined at compile time.
+
+# Validation
+
+This release was tested on the following platforms:
+* x86 cygwin and gcc 3.4 (Quad, dual and single core systems)
+* x86 linux (Ubuntu/Fedora) and gcc (4.2/4.1) (Quad and single core systems)
+* MIPS64 BE linux and gcc 3.4 16 cores system
+* MIPS32 BE linux with CodeSourcery compiler 4.2-177 on Malta/Linux with a 1004K 3-core system
+* PPC simulator with gcc 4.2.2 (No OS)
+* PPC 64b BE linux (yellowdog) with gcc 3.4 and 4.1 (Dual core system)
+* BF533 with VDSP50
+* Renesas R8C/H8 MCU with HEW 4.05
+* NXP LPC1700 armcc v4.0.0.524
+* NEC 78K with IAR v4.61
+* ARM simulator with armcc v4
+
+# Memory Analysis
+
+Valgrind 3.4.0 used and no errors reported.
+
+# Balance Analysis
+
+Number of instructions executed for each function tested with cachegrind and found balanced with gcc and -O0.
+
+# Statistics
+
+Lines:
+~~~
+Lines Blank Cmnts Source AESL
+===== ===== ===== ===== ========== =======================================
+ 469 66 170 251 627.5 core_list_join.c (C)
+ 330 18 54 268 670.0 core_main.c (C)
+ 256 32 80 146 365.0 core_matrix.c (C)
+ 240 16 51 186 465.0 core_state.c (C)
+ 165 11 20 134 335.0 core_util.c (C)
+ 150 23 36 98 245.0 coremark.h (C)
+ 1610 166 411 1083 2707.5 ----- Benchmark ----- (6 files)
+ 293 15 74 212 530.0 linux/core_portme.c (C)
+ 235 30 104 104 260.0 linux/core_portme.h (C)
+ 528 45 178 316 790.0 ----- Porting ----- (2 files)
+
+* For comparison, here are the stats for Dhrystone
+Lines Blank Cmnts Source AESL
+===== ===== ===== ===== ========== =======================================
+ 311 15 242 54 135.0 dhry.h (C)
+ 789 132 119 553 1382.5 dhry_1.c (C)
+ 186 26 68 107 267.5 dhry_2.c (C)
+ 1286 173 429 714 1785.0 ----- C ----- (3 files)
+~~~
+
+# Credits
+Many thanks to all of the individuals who helped with the development or testing of CoreMark including (Sorted by company name; note that company names may no longer be accurate as this was written in 2009).
+* Alan Anderson, ADI
+* Adhikary Rajiv, ADI
+* Elena Stohr, ARM
+* Ian Rickards, ARM
+* Andrew Pickard, ARM
+* Trent Parker, CAVIUM
+* Shay Gal-On, EEMBC
+* Markus Levy, EEMBC
+* Peter Torelli, EEMBC
+* Ron Olson, IBM
+* Eyal Barzilay, MIPS
+* Jens Eltze, NEC
+* Hirohiko Ono, NEC
+* Ulrich Drees, NEC
+* Frank Roscheda, NEC
+* Rob Cosaro, NXP
+* Shumpei Kawasaki, RENESAS
+
+# Legal
+Please refer to LICENSE.md in this reposity for a description of your rights to use this code.
+
+# Copyright
+Copyright © 2009 EEMBC All rights reserved.
+CoreMark is a trademark of EEMBC and EEMBC is a registered trademark of the Embedded Microprocessor Benchmark Consortium.
+
diff --git a/sw/app/coremark/core_list_join.c b/sw/app/coremark/core_list_join.c
new file mode 100644
index 0000000..d9c256d
--- /dev/null
+++ b/sw/app/coremark/core_list_join.c
@@ -0,0 +1,595 @@
+/*
+Copyright 2018 Embedded Microprocessor Benchmark Consortium (EEMBC)
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+Original Author: Shay Gal-on
+*/
+
+#include "coremark.h"
+/*
+Topic: Description
+ Benchmark using a linked list.
+
+ Linked list is a common data structure used in many applications.
+
+ For our purposes, this will excercise the memory units of the processor.
+ In particular, usage of the list pointers to find and alter data.
+
+ We are not using Malloc since some platforms do not support this
+library.
+
+ Instead, the memory block being passed in is used to create a list,
+ and the benchmark takes care not to add more items then can be
+ accomodated by the memory block. The porting layer will make sure
+ that we have a valid memory block.
+
+ All operations are done in place, without using any extra memory.
+
+ The list itself contains list pointers and pointers to data items.
+ Data items contain the following:
+
+ idx - An index that captures the initial order of the list.
+ data - Variable data initialized based on the input parameters. The 16b
+are divided as follows: o Upper 8b are backup of original data. o Bit 7
+indicates if the lower 7 bits are to be used as is or calculated. o Bits 0-2
+indicate type of operation to perform to get a 7b value. o Bits 3-6 provide
+input for the operation.
+
+*/
+
+/* local functions */
+
+list_head *core_list_find(list_head *list, list_data *info);
+list_head *core_list_reverse(list_head *list);
+list_head *core_list_remove(list_head *item);
+list_head *core_list_undo_remove(list_head *item_removed,
+ list_head *item_modified);
+list_head *core_list_insert_new(list_head * insert_point,
+ list_data * info,
+ list_head **memblock,
+ list_data **datablock,
+ list_head * memblock_end,
+ list_data * datablock_end);
+typedef ee_s32 (*list_cmp)(list_data *a, list_data *b, core_results *res);
+list_head *core_list_mergesort(list_head * list,
+ list_cmp cmp,
+ core_results *res);
+
+ee_s16
+calc_func(ee_s16 *pdata, core_results *res)
+{
+ ee_s16 data = *pdata;
+ ee_s16 retval;
+ ee_u8 optype
+ = (data >> 7)
+ & 1; /* bit 7 indicates if the function result has been cached */
+ if (optype) /* if cached, use cache */
+ return (data & 0x007f);
+ else
+ { /* otherwise calculate and cache the result */
+ ee_s16 flag = data & 0x7; /* bits 0-2 is type of function to perform */
+ ee_s16 dtype
+ = ((data >> 3)
+ & 0xf); /* bits 3-6 is specific data for the operation */
+ dtype |= dtype << 4; /* replicate the lower 4 bits to get an 8b value */
+ switch (flag)
+ {
+ case 0:
+ if (dtype < 0x22) /* set min period for bit corruption */
+ dtype = 0x22;
+ retval = core_bench_state(res->size,
+ res->memblock[3],
+ res->seed1,
+ res->seed2,
+ dtype,
+ res->crc);
+ if (res->crcstate == 0)
+ res->crcstate = retval;
+ break;
+ case 1:
+ retval = core_bench_matrix(&(res->mat), dtype, res->crc);
+ if (res->crcmatrix == 0)
+ res->crcmatrix = retval;
+ break;
+ default:
+ retval = data;
+ break;
+ }
+ res->crc = crcu16(retval, res->crc);
+ retval &= 0x007f;
+ *pdata = (data & 0xff00) | 0x0080 | retval; /* cache the result */
+ return retval;
+ }
+}
+/* Function: cmp_complex
+ Compare the data item in a list cell.
+
+ Can be used by mergesort.
+*/
+ee_s32
+cmp_complex(list_data *a, list_data *b, core_results *res)
+{
+ ee_s16 val1 = calc_func(&(a->data16), res);
+ ee_s16 val2 = calc_func(&(b->data16), res);
+ return val1 - val2;
+}
+
+/* Function: cmp_idx
+ Compare the idx item in a list cell, and regen the data.
+
+ Can be used by mergesort.
+*/
+ee_s32
+cmp_idx(list_data *a, list_data *b, core_results *res)
+{
+ if (res == NULL)
+ {
+ a->data16 = (a->data16 & 0xff00) | (0x00ff & (a->data16 >> 8));
+ b->data16 = (b->data16 & 0xff00) | (0x00ff & (b->data16 >> 8));
+ }
+ return a->idx - b->idx;
+}
+
+void
+copy_info(list_data *to, list_data *from)
+{
+ to->data16 = from->data16;
+ to->idx = from->idx;
+}
+
+/* Benchmark for linked list:
+ - Try to find multiple data items.
+ - List sort
+ - Operate on data from list (crc)
+ - Single remove/reinsert
+ * At the end of this function, the list is back to original state
+*/
+ee_u16
+core_bench_list(core_results *res, ee_s16 finder_idx)
+{
+ ee_u16 retval = 0;
+ ee_u16 found = 0, missed = 0;
+ list_head *list = res->list;
+ ee_s16 find_num = res->seed3;
+ list_head *this_find;
+ list_head *finder, *remover;
+ list_data info;
+ ee_s16 i;
+
+ info.idx = finder_idx;
+ /* find <find_num> values in the list, and change the list each time
+ * (reverse and cache if value found) */
+ for (i = 0; i < find_num; i++)
+ {
+ info.data16 = (i & 0xff);
+ this_find = core_list_find(list, &info);
+ list = core_list_reverse(list);
+ if (this_find == NULL)
+ {
+ missed++;
+ retval += (list->next->info->data16 >> 8) & 1;
+ }
+ else
+ {
+ found++;
+ if (this_find->info->data16 & 0x1) /* use found value */
+ retval += (this_find->info->data16 >> 9) & 1;
+ /* and cache next item at the head of the list (if any) */
+ if (this_find->next != NULL)
+ {
+ finder = this_find->next;
+ this_find->next = finder->next;
+ finder->next = list->next;
+ list->next = finder;
+ }
+ }
+ if (info.idx >= 0)
+ info.idx++;
+#if CORE_DEBUG
+ ee_printf("List find %d: [%d,%d,%d]\n", i, retval, missed, found);
+#endif
+ }
+ retval += found * 4 - missed;
+ /* sort the list by data content and remove one item*/
+ if (finder_idx > 0)
+ list = core_list_mergesort(list, cmp_complex, res);
+ remover = core_list_remove(list->next);
+ /* CRC data content of list from location of index N forward, and then undo
+ * remove */
+ finder = core_list_find(list, &info);
+ if (!finder)
+ finder = list->next;
+ while (finder)
+ {
+ retval = crc16(list->info->data16, retval);
+ finder = finder->next;
+ }
+#if CORE_DEBUG
+ ee_printf("List sort 1: %04x\n", retval);
+#endif
+ remover = core_list_undo_remove(remover, list->next);
+ /* sort the list by index, in effect returning the list to original state */
+ list = core_list_mergesort(list, cmp_idx, NULL);
+ /* CRC data content of list */
+ finder = list->next;
+ while (finder)
+ {
+ retval = crc16(list->info->data16, retval);
+ finder = finder->next;
+ }
+#if CORE_DEBUG
+ ee_printf("List sort 2: %04x\n", retval);
+#endif
+ return retval;
+}
+/* Function: core_list_init
+ Initialize list with data.
+
+ Parameters:
+ blksize - Size of memory to be initialized.
+ memblock - Pointer to memory block.
+ seed - Actual values chosen depend on the seed parameter.
+ The seed parameter MUST be supplied from a source that cannot be
+ determined at compile time
+
+ Returns:
+ Pointer to the head of the list.
+
+*/
+list_head *
+core_list_init(ee_u32 blksize, list_head *memblock, ee_s16 seed)
+{
+ /* calculated pointers for the list */
+ ee_u32 per_item = 16 + sizeof(struct list_data_s);
+ ee_u32 size = (blksize / per_item)
+ - 2; /* to accomodate systems with 64b pointers, and make sure
+ same code is executed, set max list elements */
+ list_head *memblock_end = memblock + size;
+ list_data *datablock = (list_data *)(memblock_end);
+ list_data *datablock_end = datablock + size;
+ /* some useful variables */
+ ee_u32 i;
+ list_head *finder, *list = memblock;
+ list_data info;
+
+ /* create a fake items for the list head and tail */
+ list->next = NULL;
+ list->info = datablock;
+ list->info->idx = 0x0000;
+ list->info->data16 = (ee_s16)0x8080;
+ memblock++;
+ datablock++;
+ info.idx = 0x7fff;
+ info.data16 = (ee_s16)0xffff;
+ core_list_insert_new(
+ list, &info, &memblock, &datablock, memblock_end, datablock_end);
+
+ /* then insert size items */
+ for (i = 0; i < size; i++)
+ {
+ ee_u16 datpat = ((ee_u16)(seed ^ i) & 0xf);
+ ee_u16 dat
+ = (datpat << 3) | (i & 0x7); /* alternate between algorithms */
+ info.data16 = (dat << 8) | dat; /* fill the data with actual data and
+ upper bits with rebuild value */
+ core_list_insert_new(
+ list, &info, &memblock, &datablock, memblock_end, datablock_end);
+ }
+ /* and now index the list so we know initial seed order of the list */
+ finder = list->next;
+ i = 1;
+ while (finder->next != NULL)
+ {
+ if (i < size / 5) /* first 20% of the list in order */
+ finder->info->idx = i++;
+ else
+ {
+ ee_u16 pat = (ee_u16)(i++ ^ seed); /* get a pseudo random number */
+ finder->info->idx = 0x3fff
+ & (((i & 0x07) << 8)
+ | pat); /* make sure the mixed items end up
+ after the ones in sequence */
+ }
+ finder = finder->next;
+ }
+ list = core_list_mergesort(list, cmp_idx, NULL);
+#if CORE_DEBUG
+ ee_printf("Initialized list:\n");
+ finder = list;
+ while (finder)
+ {
+ ee_printf(
+ "[%04x,%04x]", finder->info->idx, (ee_u16)finder->info->data16);
+ finder = finder->next;
+ }
+ ee_printf("\n");
+#endif
+ return list;
+}
+
+/* Function: core_list_insert
+ Insert an item to the list
+
+ Parameters:
+ insert_point - where to insert the item.
+ info - data for the cell.
+ memblock - pointer for the list header
+ datablock - pointer for the list data
+ memblock_end - end of region for list headers
+ datablock_end - end of region for list data
+
+ Returns:
+ Pointer to new item.
+*/
+list_head *
+core_list_insert_new(list_head * insert_point,
+ list_data * info,
+ list_head **memblock,
+ list_data **datablock,
+ list_head * memblock_end,
+ list_data * datablock_end)