rggen_mux.veryl

pub module rggen_mux #(
  param TYPE: type  = logic,
  param N:    u32   = 1
)(
  i_select: input   logic<N>,
  i_data:   input   TYPE<N>,
  o_data:   output  TYPE
) {
  const WIDTH:  u32 = $bits(TYPE);
  const DEPTH:  u32 = $clog2(N);

  function reduce_or(
    data: input logic<N, WIDTH>
  ) -> logic<WIDTH> {
    var current_n:    u32;
    var current_data: logic<N, WIDTH>;
    var next_n:       u32;
    var next_data:    logic<N, WIDTH>;

    next_n    = N;
    next_data = data;
    for _i: u32 in 0..DEPTH {
      current_n     = next_n;
      current_data  = next_data;

      next_n  = (current_n / 2) + (current_n % 2);
      for j: u32 in 0..next_n {
        if ((j + 1) == next_n) && ((current_n % 2) == 1) {
          next_data[j]  = current_data[2*j+0];
        } else {
          next_data[j]  = current_data[2*j+0] | current_data[2*j+1];
        }
      }
    }

    return next_data[0];
  }

  function mux(
    select: input logic<N>,
    data:   input TYPE<N>
  ) -> TYPE {
    if N >= 2 {
      var masked_data:  logic<N, WIDTH>;
      var result:       logic<WIDTH>;

      for i: u32 in 0..N {
        masked_data[i]  = {select[i] repeat WIDTH} & data[i];
      }
      result  = reduce_or(masked_data);

      return result as TYPE;
    } else {
      return data[0];
    }
  }

  always_comb {
    o_data  = mux(i_select, i_data);
  }
}