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Posting here as a to-do.
The trace parser script implicitly assumes that all load and store instructions do not use post-increment addressing. https://github.com/pulp-platform/mempool/blob/main/hardware/scripts/gen_trace.py#L189-L199 extras['alu_result'] is always printed as accessed address, but Reg[rs1] is the actually accessed address when post-increment is used.
To fix:
also trace i_snitch.is_postincr in the tracer in mempool_cc
enhance the lines above of the tracer script to change the printed memory address of post-increment instructions
The text was updated successfully, but these errors were encountered:
Posting here as a to-do.
The trace parser script implicitly assumes that all load and store instructions do not use post-increment addressing.
https://github.com/pulp-platform/mempool/blob/main/hardware/scripts/gen_trace.py#L189-L199
extras['alu_result']
is always printed as accessed address, butReg[rs1]
is the actually accessed address when post-increment is used.To fix:
i_snitch.is_postincr
in the tracer inmempool_cc
The text was updated successfully, but these errors were encountered: