diff --git a/LICENSE b/LICENSE index 6bebed2..5b32bf9 100644 --- a/LICENSE +++ b/LICENSE @@ -1,4 +1,4 @@ -Copyright (c) 2016-2019 NXP +Copyright (c) 2016-2020 NXP Copyright (c) 2014-2016 Freescale Semiconductor, Inc. Copyright (c) 2014, Mentor Graphics Corporation Copyright (c) 2015 Xilinx, Inc. All rights reserved. diff --git a/README.md b/README.md index 98b22a6..3accdfb 100644 --- a/README.md +++ b/README.md @@ -97,7 +97,7 @@ The RPMsg-Lite can be configured at the compile time. The default configuration We welcome and encourage the community to submit patches directly to the rpmsg-lite project placed on github. Contributing can be managed via pull-requests. Before a pull-request is created the code should be tested and properly formatted. ## How to format rpmsg-lite code -To format code, use the application developed by Google, named *clang-format*. This tool is part of the [llvm](http://llvm.org/) project. Currently, the clang-format 7.0.1 version is used for rpmsg-lite. +To format code, use the application developed by Google, named *clang-format*. This tool is part of the [llvm](http://llvm.org/) project. Currently, the clang-format 10.0.0 version is used for rpmsg-lite. The set of style settings used for clang-format is defined in the `.clang-format` file, placed in a root of the rpmsg-lite directory where Python script ``run_clang_format.py`` can be executed. This script executes the application named *clang-format.exe*. You need to have the path of this application in the OS's environment path, or you need to change the script. @@ -106,4 +106,4 @@ This script executes the application named *clang-format.exe*. You need to have --- Copyright © 2016 Freescale Semiconductor, Inc. -Copyright © 2016-2019 NXP +Copyright © 2016-2020 NXP diff --git a/doxygen/Doxyfile.rpmsglite b/doxygen/Doxyfile.rpmsglite index 2bed71f..c629455 100644 --- a/doxygen/Doxyfile.rpmsglite +++ b/doxygen/Doxyfile.rpmsglite @@ -38,7 +38,7 @@ PROJECT_NAME = "RPMsg-Lite User's Guide" # could be handy for archiving the generated documentation or if some version # control system is used. -PROJECT_NUMBER = "Rev. 3.0.0" +PROJECT_NUMBER = "Rev. 3.1.0" # Using the PROJECT_BRIEF tag one can provide an optional one line description # for a project that appears at the top of each page and should give viewer a diff --git a/doxygen/html_footer.html b/doxygen/html_footer.html index 99eff85..dd02cae 100644 --- a/doxygen/html_footer.html +++ b/doxygen/html_footer.html @@ -3,14 +3,14 @@
-© 2016 NXP Semiconductors. All rights reserved. +Copyright 2016-2020 NXP Semiconductors. All rights reserved.
diff --git a/doxygen/mainpage_rpmsg_lite.md b/doxygen/mainpage_rpmsg_lite.md index 6aa3a0f..31b3fc8 100644 --- a/doxygen/mainpage_rpmsg_lite.md +++ b/doxygen/mainpage_rpmsg_lite.md @@ -108,4 +108,5 @@ This table summarizes revisions of this document. |5.0 | 09/2018 | Align porting layers to the updated MCUXpressoSDK feature files

Allow rpmsg-lite build by Keil MDK ArmClangV6 compiler | |6.0 | 04/2019 | Added configuration macro RL_DEBUG_CHECK_BUFFERS

Several MISRA violations fixed

Added environment layers for QNX and Zephyr

Allow environment context required for some environments (controlled by the RL_USE_ENVIRONMENT_CONTEXT configuration macro). | |7.0 | 11/2019 | MISRA C-2012 violations fixed, incl. data types consolidation

Code formatted. | +|8.0 | 04/2020 | MISRA C-2012 violations fixed (7.4)

Fix missing lock in rpmsg_lite_rx_callback() for QNX env

Correction of rpmsg_lite_instance structure members description

Address -Waddress-of-packed-member warnings in GCC9

Clang update to v10.0.0, code re-formatted. | diff --git a/lib/include/platform/imx6sx_m4/rpmsg_platform.h b/lib/include/platform/imx6sx_m4/rpmsg_platform.h index a1900c5..e09a8cd 100644 --- a/lib/include/platform/imx6sx_m4/rpmsg_platform.h +++ b/lib/include/platform/imx6sx_m4/rpmsg_platform.h @@ -30,11 +30,11 @@ #define RL_VRING_OVERHEAD (2UL * VRING_SIZE) #define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) -#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) -#define RL_GET_Q_ID(id) ((id)&0x1U) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) #define RL_PLATFORM_IMX6SX_M4_LINK_ID (0U) -#define RL_PLATFORM_HIGHEST_LINK_ID (0U) +#define RL_PLATFORM_HIGHEST_LINK_ID (0U) /* platform interrupt related functions */ int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); diff --git a/lib/include/platform/imx7d_m4/rpmsg_platform.h b/lib/include/platform/imx7d_m4/rpmsg_platform.h index 8b29d53..9febe55 100644 --- a/lib/include/platform/imx7d_m4/rpmsg_platform.h +++ b/lib/include/platform/imx7d_m4/rpmsg_platform.h @@ -30,11 +30,11 @@ #define RL_VRING_OVERHEAD (2UL * VRING_SIZE) #define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) -#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) -#define RL_GET_Q_ID(id) ((id)&0x1U) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) #define RL_PLATFORM_IMX7D_M4_LINK_ID (0U) -#define RL_PLATFORM_HIGHEST_LINK_ID (0U) +#define RL_PLATFORM_HIGHEST_LINK_ID (0U) /* platform interrupt related functions */ int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); diff --git a/lib/include/platform/imx7ulp_m4/rpmsg_platform.h b/lib/include/platform/imx7ulp_m4/rpmsg_platform.h index e125c85..0edf151 100644 --- a/lib/include/platform/imx7ulp_m4/rpmsg_platform.h +++ b/lib/include/platform/imx7ulp_m4/rpmsg_platform.h @@ -30,12 +30,12 @@ #define RL_VRING_OVERHEAD (2UL * VRING_SIZE) #define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) -#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) -#define RL_GET_Q_ID(id) ((id)&0x1U) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) #define RL_PLATFORM_IMX7ULP_M4_SRTM_LINK_ID (0U) #define RL_PLATFORM_IMX7ULP_M4_USER_LINK_ID (1U) -#define RL_PLATFORM_HIGHEST_LINK_ID (1U) +#define RL_PLATFORM_HIGHEST_LINK_ID (1U) /* platform interrupt related functions */ int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); diff --git a/lib/include/platform/imx8mm_m4/rpmsg_platform.h b/lib/include/platform/imx8mm_m4/rpmsg_platform.h index 98bee51..5e7d36f 100644 --- a/lib/include/platform/imx8mm_m4/rpmsg_platform.h +++ b/lib/include/platform/imx8mm_m4/rpmsg_platform.h @@ -30,11 +30,11 @@ #define RL_VRING_OVERHEAD (2UL * VRING_SIZE) #define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) -#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) -#define RL_GET_Q_ID(id) ((id)&0x1U) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) #define RL_PLATFORM_IMX8MM_M4_USER_LINK_ID (0U) -#define RL_PLATFORM_HIGHEST_LINK_ID (15U) +#define RL_PLATFORM_HIGHEST_LINK_ID (15U) /* platform interrupt related functions */ int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); diff --git a/lib/include/platform/imx8mn_m7/rpmsg_platform.h b/lib/include/platform/imx8mn_m7/rpmsg_platform.h new file mode 100644 index 0000000..708766e --- /dev/null +++ b/lib/include/platform/imx8mn_m7/rpmsg_platform.h @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2016 Freescale Semiconductor, Inc. + * Copyright 2016-2019 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef RPMSG_PLATFORM_H_ +#define RPMSG_PLATFORM_H_ + +#include + +/* RPMSG MU channel index */ +#define RPMSG_MU_CHANNEL (1) + +/* + * Linux requires the ALIGN to 0x1000(4KB) instead of 0x80 + */ +#ifndef VRING_ALIGN +#define VRING_ALIGN (0x1000U) +#endif + +/* contains pool of descriptors and two circular buffers */ +#ifndef VRING_SIZE +#define VRING_SIZE (0x8000UL) +#endif + +/* size of shared memory + 2*VRING size */ +#define RL_VRING_OVERHEAD (2UL * VRING_SIZE) + +#define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) + +#define RL_PLATFORM_IMX8MN_M7_USER_LINK_ID (0U) +#define RL_PLATFORM_HIGHEST_LINK_ID (15U) + +/* platform interrupt related functions */ +int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); +int32_t platform_deinit_interrupt(uint32_t vector_id); +int32_t platform_interrupt_enable(uint32_t vector_id); +int32_t platform_interrupt_disable(uint32_t vector_id); +int32_t platform_in_isr(void); +void platform_notify(uint32_t vector_id); + +/* platform low-level time-delay (busy loop) */ +void platform_time_delay(uint32_t num_msec); + +/* platform memory functions */ +void platform_map_mem_region(uint32_t vrt_addr, uint32_t phy_addr, uint32_t size, uint32_t flags); +void platform_cache_all_flush_invalidate(void); +void platform_cache_disable(void); +uint32_t platform_vatopa(void *addr); +void *platform_patova(uint32_t addr); + +/* platform init/deinit */ +int32_t platform_init(void); +int32_t platform_deinit(void); + +#endif /* RPMSG_PLATFORM_H_ */ diff --git a/lib/include/platform/imx8mq_m4/rpmsg_platform.h b/lib/include/platform/imx8mq_m4/rpmsg_platform.h index eb6620d..9b21b2d 100644 --- a/lib/include/platform/imx8mq_m4/rpmsg_platform.h +++ b/lib/include/platform/imx8mq_m4/rpmsg_platform.h @@ -30,11 +30,11 @@ #define RL_VRING_OVERHEAD (2UL * VRING_SIZE) #define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) -#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) -#define RL_GET_Q_ID(id) ((id)&0x1U) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) #define RL_PLATFORM_IMX8MQ_M4_USER_LINK_ID (0U) -#define RL_PLATFORM_HIGHEST_LINK_ID (15U) +#define RL_PLATFORM_HIGHEST_LINK_ID (15U) /* platform interrupt related functions */ int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); diff --git a/lib/include/platform/imx8qx_cm4/rpmsg_platform.h b/lib/include/platform/imx8qx_cm4/rpmsg_platform.h new file mode 100644 index 0000000..a669af1 --- /dev/null +++ b/lib/include/platform/imx8qx_cm4/rpmsg_platform.h @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2016 Freescale Semiconductor, Inc. + * Copyright 2016-2019 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef RPMSG_PLATFORM_H_ +#define RPMSG_PLATFORM_H_ + +#include + +/* RPMSG MU channel index */ +#define RPMSG_MU_CHANNEL (1) + +/* + * Linux requires the ALIGN to 0x1000(4KB) instead of 0x80 + */ +#ifndef VRING_ALIGN +#define VRING_ALIGN (0x1000U) +#endif + +/* contains pool of descriptors and two circular buffers */ +#ifndef VRING_SIZE +#define VRING_SIZE (0x8000UL) +#endif + +/* size of shared memory + 2*VRING size */ +#define RL_VRING_OVERHEAD (2UL * VRING_SIZE) + +#define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) + +#define RL_PLATFORM_IMX8QX_CM4_SRTM_LINK_ID (0U) +#define RL_PLATFORM_IMX8QX_CM4_USER_LINK_ID (1U) +#define RL_PLATFORM_HIGHEST_LINK_ID (15U) + +/* platform interrupt related functions */ +int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); +int32_t platform_deinit_interrupt(uint32_t vector_id); +int32_t platform_interrupt_enable(uint32_t vector_id); +int32_t platform_interrupt_disable(uint32_t vector_id); +int32_t platform_in_isr(void); +void platform_notify(uint32_t vector_id); + +/* platform low-level time-delay (busy loop) */ +void platform_time_delay(uint32_t num_msec); + +/* platform memory functions */ +void platform_map_mem_region(uint32_t vrt_addr, uint32_t phy_addr, uint32_t size, uint32_t flags); +void platform_cache_all_flush_invalidate(void); +void platform_cache_disable(void); +uint32_t platform_vatopa(void *addr); +void *platform_patova(uint32_t addr); + +/* platform init/deinit */ +int32_t platform_init(void); +int32_t platform_deinit(void); + +int32_t LSIO_MU5_INT_B_IRQHandler(void); + +#endif /* RPMSG_PLATFORM_H_ */ diff --git a/lib/include/platform/imxrt600_hifi4/rpmsg_platform.h b/lib/include/platform/imxrt600_hifi4/rpmsg_platform.h new file mode 100644 index 0000000..ebb859e --- /dev/null +++ b/lib/include/platform/imxrt600_hifi4/rpmsg_platform.h @@ -0,0 +1,64 @@ +/* + * Copyright 2019 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef RPMSG_PLATFORM_H_ +#define RPMSG_PLATFORM_H_ + +#include + +/* RPMSG MU channel index */ +#define RPMSG_MU_CHANNEL (1) + +#define RPMSG_LITE_LINK_ID 0x1 + +/* + * No need to align the VRING as defined in Linux because LPCNEXT0 is not intended + * to run the Linux + */ +#ifndef VRING_ALIGN +#define VRING_ALIGN (0x10U) +#endif + +/* contains pool of descriptos and two circular buffers */ +#ifndef VRING_SIZE +#define VRING_SIZE (0x400UL) +#endif + +/* size of shared memory + 2*VRING size */ +#define RL_VRING_OVERHEAD (2UL * VRING_SIZE) + +#define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) + +#define RL_PLATFORM_LPCNEXT0_LINK_ID (0U) +#define RL_PLATFORM_HIGHEST_LINK_ID (1U) + +/* platform interrupt related functions */ +int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); +int32_t platform_deinit_interrupt(uint32_t vector_id); +int32_t platform_interrupt_enable(uint32_t vector_id); +int32_t platform_interrupt_disable(uint32_t vector_id); +int32_t platform_in_isr(void); +void platform_notify(uint32_t vector_id); + +/* platform low-level time-delay (busy loop) */ +void platform_time_delay(uint32_t num_msec); + +/* platform memory functions */ +void platform_map_mem_region(uint32_t vrt_addr, uint32_t phy_addr, uint32_t size, uint32_t flags); +void platform_cache_all_flush_invalidate(void); +void platform_cache_disable(void); +uint32_t platform_vatopa(void *addr); +void *platform_patova(uint32_t addr); + +/* platform init/deinit */ +int32_t platform_init(void); +int32_t platform_deinit(void); + +#endif /* RPMSG_PLATFORM_H_ */ diff --git a/lib/include/platform/imxrt600_m33/rpmsg_platform.h b/lib/include/platform/imxrt600_m33/rpmsg_platform.h new file mode 100644 index 0000000..840b229 --- /dev/null +++ b/lib/include/platform/imxrt600_m33/rpmsg_platform.h @@ -0,0 +1,61 @@ +/* + * Copyright 2019 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef RPMSG_PLATFORM_H_ +#define RPMSG_PLATFORM_H_ + +#include + +/* RPMSG MU channel index */ +#define RPMSG_MU_CHANNEL (1) + +/* + * No need to align the VRING as defined in Linux because LPC6324 is not intended + * to run the Linux + */ +#ifndef VRING_ALIGN +#define VRING_ALIGN (0x10U) +#endif + +/* contains pool of descriptos and two circular buffers */ +#ifndef VRING_SIZE +#define VRING_SIZE (0x400UL) +#endif + +/* size of shared memory + 2*VRING size */ +#define RL_VRING_OVERHEAD (2UL * VRING_SIZE) + +#define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) + +#define RL_PLATFORM_LPC6324_M33_DSP_LINK_ID (0U) +#define RL_PLATFORM_HIGHEST_LINK_ID (0U) + +/* platform interrupt related functions */ +int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); +int32_t platform_deinit_interrupt(uint32_t vector_id); +int32_t platform_interrupt_enable(uint32_t vector_id); +int32_t platform_interrupt_disable(uint32_t vector_id); +int32_t platform_in_isr(void); +void platform_notify(uint32_t vector_id); + +/* platform low-level time-delay (busy loop) */ +void platform_time_delay(uint32_t num_msec); + +/* platform memory functions */ +void platform_map_mem_region(uint32_t vrt_addr, uint32_t phy_addr, uint32_t size, uint32_t flags); +void platform_cache_all_flush_invalidate(void); +void platform_cache_disable(void); +uint32_t platform_vatopa(void *addr); +void *platform_patova(uint32_t addr); + +/* platform init/deinit */ +int32_t platform_init(void); +int32_t platform_deinit(void); + +#endif /* RPMSG_PLATFORM_H_ */ diff --git a/lib/include/platform/k32l3a6/rpmsg_platform.h b/lib/include/platform/k32l3a6/rpmsg_platform.h index 98339d0..5087db9 100644 --- a/lib/include/platform/k32l3a6/rpmsg_platform.h +++ b/lib/include/platform/k32l3a6/rpmsg_platform.h @@ -29,11 +29,11 @@ #define RL_VRING_OVERHEAD (2UL * VRING_SIZE) #define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) -#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) -#define RL_GET_Q_ID(id) ((id)&0x1U) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) #define RL_PLATFORM_K32L3A60_M4_M0_LINK_ID (0U) -#define RL_PLATFORM_HIGHEST_LINK_ID (0U) +#define RL_PLATFORM_HIGHEST_LINK_ID (0U) /* platform interrupt related functions */ int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); diff --git a/lib/include/platform/lpc5410x/rpmsg_platform.h b/lib/include/platform/lpc5410x/rpmsg_platform.h index 3af8289..33478c7 100644 --- a/lib/include/platform/lpc5410x/rpmsg_platform.h +++ b/lib/include/platform/lpc5410x/rpmsg_platform.h @@ -29,11 +29,11 @@ #define RL_VRING_OVERHEAD (2UL * VRING_SIZE) #define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) -#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) -#define RL_GET_Q_ID(id) ((id)&0x1U) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) #define RL_PLATFORM_LPC5410x_M4_M0_LINK_ID (0U) -#define RL_PLATFORM_HIGHEST_LINK_ID (0U) +#define RL_PLATFORM_HIGHEST_LINK_ID (0U) /* platform interrupt related functions */ int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); diff --git a/lib/include/platform/lpc5411x/rpmsg_platform.h b/lib/include/platform/lpc5411x/rpmsg_platform.h index ed49d17..cf22d7d 100644 --- a/lib/include/platform/lpc5411x/rpmsg_platform.h +++ b/lib/include/platform/lpc5411x/rpmsg_platform.h @@ -29,11 +29,11 @@ #define RL_VRING_OVERHEAD (2UL * VRING_SIZE) #define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) -#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) -#define RL_GET_Q_ID(id) ((id)&0x1U) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) #define RL_PLATFORM_LPC5411x_M4_M0_LINK_ID (0U) -#define RL_PLATFORM_HIGHEST_LINK_ID (0U) +#define RL_PLATFORM_HIGHEST_LINK_ID (0U) /* platform interrupt related functions */ int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); diff --git a/lib/include/platform/lpc55s69/rpmsg_platform.h b/lib/include/platform/lpc55s69/rpmsg_platform.h index 39e2346..8a31538 100644 --- a/lib/include/platform/lpc55s69/rpmsg_platform.h +++ b/lib/include/platform/lpc55s69/rpmsg_platform.h @@ -28,11 +28,11 @@ #define RL_VRING_OVERHEAD (2UL * VRING_SIZE) #define RL_GET_VQ_ID(link_id, queue_id) (((queue_id)&0x1U) | (((link_id) << 1U) & 0xFFFFFFFEU)) -#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) -#define RL_GET_Q_ID(id) ((id)&0x1U) +#define RL_GET_LINK_ID(id) (((id)&0xFFFFFFFEU) >> 1U) +#define RL_GET_Q_ID(id) ((id)&0x1U) #define RL_PLATFORM_LPC55S69_M33_M33_LINK_ID (0U) -#define RL_PLATFORM_HIGHEST_LINK_ID (0U) +#define RL_PLATFORM_HIGHEST_LINK_ID (0U) /* platform interrupt related functions */ int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data); diff --git a/lib/include/rpmsg_env.h b/lib/include/rpmsg_env.h index d5cf25c..38937b1 100644 --- a/lib/include/rpmsg_env.h +++ b/lib/include/rpmsg_env.h @@ -294,7 +294,7 @@ void env_unlock_mutex(void *lock); * * @returns - status of function execution */ -#define LOCKED 0 +#define LOCKED 0 #define UNLOCKED 1 int32_t env_create_sync_lock(void **lock, int32_t state); @@ -427,9 +427,9 @@ void env_disable_interrupt(uint32_t vector_id); /* Memory Types */ #define MEM_MAPPED (1 << 4) -#define IO_MAPPED (1 << 5) +#define IO_MAPPED (1 << 5) #define SHARED_MEM (1 << 6) -#define TLB_MEM (1 << 7) +#define TLB_MEM (1 << 7) void env_map_memory(uint32_t pa, uint32_t va, uint32_t size, uint32_t flags); diff --git a/lib/include/rpmsg_lite.h b/lib/include/rpmsg_lite.h index 4d110d5..77871ab 100644 --- a/lib/include/rpmsg_lite.h +++ b/lib/include/rpmsg_lite.h @@ -2,7 +2,7 @@ * Copyright (c) 2014, Mentor Graphics Corporation * Copyright (c) 2015 Xilinx, Inc. * Copyright (c) 2016 Freescale Semiconductor, Inc. - * Copyright 2016-2019 NXP + * Copyright 2016-2020 NXP * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -51,7 +51,7 @@ extern "C" { * Definitions ******************************************************************************/ -#define RL_VERSION "3.0.0" /*!< Current RPMsg Lite version */ +#define RL_VERSION "3.1.0" /*!< Current RPMsg Lite version */ /* Shared memory "allocator" parameters */ #define RL_WORD_SIZE (sizeof(uint32_t)) @@ -61,28 +61,28 @@ extern "C" { (((((uint32_t)a) & (RL_WORD_SIZE - 1U)) != 0U) ? (((uint32_t)a) & (~(RL_WORD_SIZE - 1U))) : ((uint32_t)a)) /* Definitions for device types , null pointer, etc.*/ -#define RL_SUCCESS (0) -#define RL_NULL ((void *)0) -#define RL_REMOTE (0) -#define RL_MASTER (1) -#define RL_TRUE (1U) -#define RL_FALSE (0U) -#define RL_ADDR_ANY (0xFFFFFFFFU) -#define RL_RELEASE (0) -#define RL_HOLD (1) +#define RL_SUCCESS (0) +#define RL_NULL ((void *)0) +#define RL_REMOTE (0) +#define RL_MASTER (1) +#define RL_TRUE (1U) +#define RL_FALSE (0U) +#define RL_ADDR_ANY (0xFFFFFFFFU) +#define RL_RELEASE (0) +#define RL_HOLD (1) #define RL_DONT_BLOCK (0) -#define RL_BLOCK (0xFFFFFFFFU) +#define RL_BLOCK (0xFFFFFFFFU) /* Error macros. */ -#define RL_ERRORS_BASE (-5000) -#define RL_ERR_NO_MEM (RL_ERRORS_BASE - 1) +#define RL_ERRORS_BASE (-5000) +#define RL_ERR_NO_MEM (RL_ERRORS_BASE - 1) #define RL_ERR_BUFF_SIZE (RL_ERRORS_BASE - 2) -#define RL_ERR_PARAM (RL_ERRORS_BASE - 3) -#define RL_ERR_DEV_ID (RL_ERRORS_BASE - 4) -#define RL_ERR_MAX_VQ (RL_ERRORS_BASE - 5) -#define RL_ERR_NO_BUFF (RL_ERRORS_BASE - 6) -#define RL_NOT_READY (RL_ERRORS_BASE - 7) -#define RL_ALREADY_DONE (RL_ERRORS_BASE - 8) +#define RL_ERR_PARAM (RL_ERRORS_BASE - 3) +#define RL_ERR_DEV_ID (RL_ERRORS_BASE - 4) +#define RL_ERR_MAX_VQ (RL_ERRORS_BASE - 5) +#define RL_ERR_NO_BUFF (RL_ERRORS_BASE - 6) +#define RL_NOT_READY (RL_ERRORS_BASE - 7) +#define RL_ALREADY_DONE (RL_ERRORS_BASE - 8) /* Init flags */ #define RL_NO_FLAGS (0) @@ -127,8 +127,8 @@ struct rpmsg_lite_instance LOCK *lock; /*!< local RPMsg Lite mutex lock */ uint32_t link_state; /*!< state of the link, up/down*/ char *sh_mem_base; /*!< base address of the shared memory */ - uint32_t sh_mem_remaining; /*!< remaining free bytes of shared memory */ - uint32_t sh_mem_total; /*!< total size of shared memory */ + uint32_t sh_mem_remaining; /*!< amount of remaining unused buffers in shared memory */ + uint32_t sh_mem_total; /*!< total amount of buffers in shared memory */ struct virtqueue_ops const *vq_ops; /*!< ops functions table pointer */ #if defined(RL_USE_ENVIRONMENT_CONTEXT) && (RL_USE_ENVIRONMENT_CONTEXT == 1) void *env; /*!< pointer to the environment layer context */ diff --git a/lib/include/rpmsg_ns.h b/lib/include/rpmsg_ns.h index 9c7e796..47bb6d5 100644 --- a/lib/include/rpmsg_ns.h +++ b/lib/include/rpmsg_ns.h @@ -38,7 +38,7 @@ //! @addtogroup rpmsg_ns //! @{ -#define RL_NS_EPT_ADDR (0x35) +#define RL_NS_EPT_ADDR (0x35u) /* Up to 32 flags available */ enum rpmsg_ns_flags @@ -128,7 +128,7 @@ int32_t rpmsg_ns_unbind(struct rpmsg_lite_instance *rpmsg_lite_dev, rpmsg_ns_han */ int32_t rpmsg_ns_announce(struct rpmsg_lite_instance *rpmsg_lite_dev, struct rpmsg_lite_endpoint *new_ept, - char *ept_name, + const char *ept_name, uint32_t flags); //! @} diff --git a/lib/include/virtio_ring.h b/lib/include/virtio_ring.h index c14eb4f..7ad7ec5 100644 --- a/lib/include/virtio_ring.h +++ b/lib/include/virtio_ring.h @@ -125,7 +125,7 @@ struct vring * We publish the used event index at the end of the available ring, and vice * versa. They are at the end for backwards compatibility. */ -#define vring_used_event(vr) ((vr)->avail->ring[(vr)->num]) +#define vring_used_event(vr) ((vr)->avail->ring[(vr)->num]) #define vring_avail_event(vr) ((vr)->used->ring[(vr)->num].id) static inline int32_t vring_size(uint32_t num, uint32_t align) diff --git a/lib/include/virtqueue.h b/lib/include/virtqueue.h index 2a720c9..a53806c 100644 --- a/lib/include/virtqueue.h +++ b/lib/include/virtqueue.h @@ -40,18 +40,18 @@ typedef uint8_t boolean; #include "llist.h" /*Error Codes*/ -#define VQ_ERROR_BASE (-3000) -#define ERROR_VRING_FULL (VQ_ERROR_BASE - 1) -#define ERROR_INVLD_DESC_IDX (VQ_ERROR_BASE - 2) -#define ERROR_EMPTY_RING (VQ_ERROR_BASE - 3) -#define ERROR_NO_MEM (VQ_ERROR_BASE - 4) -#define ERROR_VRING_MAX_DESC (VQ_ERROR_BASE - 5) -#define ERROR_VRING_ALIGN (VQ_ERROR_BASE - 6) -#define ERROR_VRING_NO_BUFF (VQ_ERROR_BASE - 7) +#define VQ_ERROR_BASE (-3000) +#define ERROR_VRING_FULL (VQ_ERROR_BASE - 1) +#define ERROR_INVLD_DESC_IDX (VQ_ERROR_BASE - 2) +#define ERROR_EMPTY_RING (VQ_ERROR_BASE - 3) +#define ERROR_NO_MEM (VQ_ERROR_BASE - 4) +#define ERROR_VRING_MAX_DESC (VQ_ERROR_BASE - 5) +#define ERROR_VRING_ALIGN (VQ_ERROR_BASE - 6) +#define ERROR_VRING_NO_BUFF (VQ_ERROR_BASE - 7) #define ERROR_VQUEUE_INVLD_PARAM (VQ_ERROR_BASE - 8) #define VQUEUE_SUCCESS (0) -#define VQUEUE_DEBUG (false) +#define VQUEUE_DEBUG (false) /* This is temporary macro to replace C NULL support. * At the moment all the RTL specific functions are present in env. @@ -63,10 +63,10 @@ typedef uint8_t boolean; * in the descriptor table. This is used to verify we are correctly * handling vq_free_cnt. */ -#define VQ_RING_DESC_CHAIN_END (32768) -#define VIRTQUEUE_FLAG_INDIRECT (0x0001U) +#define VQ_RING_DESC_CHAIN_END (32768) +#define VIRTQUEUE_FLAG_INDIRECT (0x0001U) #define VIRTQUEUE_FLAG_EVENT_IDX (0x0002U) -#define VIRTQUEUE_MAX_NAME_SZ (32) /* mind the alignment */ +#define VIRTQUEUE_MAX_NAME_SZ (32) /* mind the alignment */ /* Support for indirect buffer descriptors. */ #define VIRTIO_RING_F_INDIRECT_DESC (1 << 28) diff --git a/lib/rpmsg_lite/porting/platform/imx7ulp_m4/rpmsg_platform.c b/lib/rpmsg_lite/porting/platform/imx7ulp_m4/rpmsg_platform.c index 19ce30b..657bdfb 100644 --- a/lib/rpmsg_lite/porting/platform/imx7ulp_m4/rpmsg_platform.c +++ b/lib/rpmsg_lite/porting/platform/imx7ulp_m4/rpmsg_platform.c @@ -18,8 +18,8 @@ #error "This RPMsg-Lite port requires RL_USE_ENVIRONMENT_CONTEXT set to 0" #endif -#define APP_MU_IRQ_PRIORITY (3U) -#define APP_MU_A7_SIDE_READY (0x1U) +#define APP_MU_IRQ_PRIORITY (3U) +#define APP_MU_A7_SIDE_READY (0x1U) #define APP_MU_A7_WAIT_INTERVAL_MS (10U) static int32_t isr_counter = 0; diff --git a/lib/rpmsg_lite/porting/platform/imx8mn_m7/rpmsg_platform.c b/lib/rpmsg_lite/porting/platform/imx8mn_m7/rpmsg_platform.c new file mode 100644 index 0000000..e3c2a9e --- /dev/null +++ b/lib/rpmsg_lite/porting/platform/imx8mn_m7/rpmsg_platform.c @@ -0,0 +1,283 @@ +/* + * Copyright 2017-2019 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#include +#include +#include "rpmsg_platform.h" +#include "rpmsg_env.h" + +#include "fsl_device_registers.h" +#include "fsl_mu.h" + +#if defined(RL_USE_ENVIRONMENT_CONTEXT) && (RL_USE_ENVIRONMENT_CONTEXT == 1) +#error "This RPMsg-Lite port requires RL_USE_ENVIRONMENT_CONTEXT set to 0" +#endif + +#define APP_MU_IRQ_PRIORITY (3U) + +static int32_t isr_counter = 0; +static int32_t disable_counter = 0; +static void *platform_lock; + +static void platform_global_isr_disable(void) +{ + __asm volatile("cpsid i"); +} + +static void platform_global_isr_enable(void) +{ + __asm volatile("cpsie i"); +} + +int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data) +{ + /* Register ISR to environment layer */ + env_register_isr(vector_id, isr_data); + + /* Prepare the MU Hardware, enable channel 1 interrupt */ + env_lock_mutex(platform_lock); + + RL_ASSERT(0 <= isr_counter); + if (isr_counter == 0) + { + MU_EnableInterrupts(MUB, (1UL << 27U) >> RPMSG_MU_CHANNEL); + } + isr_counter++; + + env_unlock_mutex(platform_lock); + + return 0; +} + +int32_t platform_deinit_interrupt(uint32_t vector_id) +{ + /* Prepare the MU Hardware */ + env_lock_mutex(platform_lock); + + RL_ASSERT(0 < isr_counter); + isr_counter--; + if (isr_counter == 0) + { + MU_DisableInterrupts(MUB, (1UL << 27U) >> RPMSG_MU_CHANNEL); + } + + /* Unregister ISR from environment layer */ + env_unregister_isr(vector_id); + + env_unlock_mutex(platform_lock); + + return 0; +} + +void platform_notify(uint32_t vector_id) +{ + /* As Linux suggests, use MU->Data Channel 1 as communication channel */ + uint32_t msg = (uint32_t)(vector_id << 16); + + env_lock_mutex(platform_lock); + MU_SendMsg(MUB, RPMSG_MU_CHANNEL, msg); + env_unlock_mutex(platform_lock); +} + +/* + * MU Interrrupt RPMsg handler + */ +int32_t MU_M7_IRQHandler() +{ + uint32_t channel; + + if ((((1UL << 27U) >> RPMSG_MU_CHANNEL) & MU_GetStatusFlags(MUB)) != 0UL) + { + channel = MU_ReceiveMsgNonBlocking(MUB, RPMSG_MU_CHANNEL); // Read message from RX register. + env_isr(channel >> 16); + } + /* Add for ARM errata 838869, affects Cortex-M7, Cortex-M7F Store immediate overlapping + exception return operation might vector to incorrect interrupt */ +#if defined __CORTEX_M && (__CORTEX_M == 4U) + __DSB(); +#endif + + return 0; +} + +/** + * platform_time_delay + * + * @param num_msec Delay time in ms. + * + * This is not an accurate delay, it ensures at least num_msec passed when return. + */ +void platform_time_delay(uint32_t num_msec) +{ + uint32_t loop; + + /* Recalculate the CPU frequency */ + SystemCoreClockUpdate(); + + /* Calculate the CPU loops to delay, each loop has 3 cycles */ + loop = SystemCoreClock / 3U / 1000U * num_msec; + + /* There's some difference among toolchains, 3 or 4 cycles each loop */ + while (loop > 0U) + { + __NOP(); + loop--; + } +} + +/** + * platform_in_isr + * + * Return whether CPU is processing IRQ + * + * @return True for IRQ, false otherwise. + * + */ +int32_t platform_in_isr(void) +{ + return (((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) != 0UL) ? 1 : 0); +} + +/** + * platform_interrupt_enable + * + * Enable peripheral-related interrupt + * + * @param vector_id Virtual vector ID that needs to be converted to IRQ number + * + * @return vector_id Return value is never checked. + * + */ +int32_t platform_interrupt_enable(uint32_t vector_id) +{ + RL_ASSERT(0 < disable_counter); + + platform_global_isr_disable(); + disable_counter--; + + if (disable_counter == 0) + { + NVIC_EnableIRQ(MU_M7_IRQn); + } + platform_global_isr_enable(); + return ((int32_t)vector_id); +} + +/** + * platform_interrupt_disable + * + * Disable peripheral-related interrupt. + * + * @param vector_id Virtual vector ID that needs to be converted to IRQ number + * + * @return vector_id Return value is never checked. + * + */ +int32_t platform_interrupt_disable(uint32_t vector_id) +{ + RL_ASSERT(0 <= disable_counter); + + platform_global_isr_disable(); + /* virtqueues use the same NVIC vector + if counter is set - the interrupts are disabled */ + if (disable_counter == 0) + { + NVIC_DisableIRQ(MU_M7_IRQn); + } + disable_counter++; + platform_global_isr_enable(); + return ((int32_t)vector_id); +} + +/** + * platform_map_mem_region + * + * Dummy implementation + * + */ +void platform_map_mem_region(uint32_t vrt_addr, uint32_t phy_addr, uint32_t size, uint32_t flags) +{ +} + +/** + * platform_cache_all_flush_invalidate + * + * Dummy implementation + * + */ +void platform_cache_all_flush_invalidate(void) +{ +} + +/** + * platform_cache_disable + * + * Dummy implementation + * + */ +void platform_cache_disable(void) +{ +} + +/** + * platform_vatopa + * + * Dummy implementation + * + */ +uint32_t platform_vatopa(void *addr) +{ + return ((uint32_t)(char *)addr); +} + +/** + * platform_patova + * + * Dummy implementation + * + */ +void *platform_patova(uint32_t addr) +{ + return ((void *)(char *)addr); +} + +/** + * platform_init + * + * platform/environment init + */ +int32_t platform_init(void) +{ + /* + * Prepare for the MU Interrupt + * MU must be initialized before rpmsg init is called + */ + MU_Init(MUB); + NVIC_SetPriority(MU_M7_IRQn, APP_MU_IRQ_PRIORITY); + NVIC_EnableIRQ(MU_M7_IRQn); + + /* Create lock used in multi-instanced RPMsg */ + if (0 != env_create_mutex(&platform_lock, 1)) + { + return -1; + } + + return 0; +} + +/** + * platform_deinit + * + * platform/environment deinit process + */ +int32_t platform_deinit(void) +{ + /* Delete lock used in multi-instanced RPMsg */ + env_delete_mutex(platform_lock); + platform_lock = ((void *)0); + return 0; +} diff --git a/lib/rpmsg_lite/porting/platform/imx8qx_cm4/rpmsg_platform.c b/lib/rpmsg_lite/porting/platform/imx8qx_cm4/rpmsg_platform.c new file mode 100644 index 0000000..ce21ad1 --- /dev/null +++ b/lib/rpmsg_lite/porting/platform/imx8qx_cm4/rpmsg_platform.c @@ -0,0 +1,299 @@ +/* + * Copyright 2017-2019 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#include +#include + +#include "rpmsg_platform.h" +#include "rpmsg_env.h" + +#include "fsl_device_registers.h" +#include "fsl_mu.h" + +#include "fsl_irqsteer.h" + +#if defined(RL_USE_ENVIRONMENT_CONTEXT) && (RL_USE_ENVIRONMENT_CONTEXT == 1) +#error "This RPMsg-Lite port requires RL_USE_ENVIRONMENT_CONTEXT set to 0" +#endif + +#define APP_MU_IRQ_PRIORITY (3U) + +#define APP_M4_MU LSIO__MU5_B +#define APP_M4_MU_IRQn LSIO_MU5_INT_B_IRQn +#define APP_M4_MU_NVIC_IRQn IRQSTEER_3_IRQn + +/* NVIC IRQn that correspond to the LSIO MU IRQn is obtained with the following + * calculation: + * + * NVIC_IRQn = IRQSTEER_0_IRQn + (LSIO_MU_IRQn - FSL_FEATURE_IRQSTEER_IRQ_START_INDEX) / 64 + * + * LSIO_MU_IRQn min = LSIO_MU0_INT_IRQn = 259 + * LSIO_MU_IRQn max = LSIO_MU13_INT_B_IRQn = 291 + * + * With all the LSIO MUs, the NVIC_IRQn = 35, that corresponds to IRQSTEER_3_IRQn + */ + +static int32_t isr_counter = 0; +static int32_t disable_counter = 0; +static void *platform_lock; + +static void platform_global_isr_disable(void) +{ + __asm volatile("cpsid i"); +} + +static void platform_global_isr_enable(void) +{ + __asm volatile("cpsie i"); +} + +int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data) +{ + /* Register ISR to environment layer */ + env_register_isr(vector_id, isr_data); + + /* Prepare the MU Hardware, enable channel 1 interrupt */ + env_lock_mutex(platform_lock); + + RL_ASSERT(0 <= isr_counter); + if (isr_counter == 0) + { + MU_EnableInterrupts(APP_M4_MU, (1UL << 27U) >> RPMSG_MU_CHANNEL); + } + isr_counter++; + + env_unlock_mutex(platform_lock); + + return 0; +} + +int32_t platform_deinit_interrupt(uint32_t vector_id) +{ + /* Prepare the MU Hardware */ + env_lock_mutex(platform_lock); + + RL_ASSERT(0 < isr_counter); + isr_counter--; + if (isr_counter == 0) + { + MU_DisableInterrupts(APP_M4_MU, (1UL << 27U) >> RPMSG_MU_CHANNEL); + } + + /* Unregister ISR from environment layer */ + env_unregister_isr(vector_id); + + env_unlock_mutex(platform_lock); + + return 0; +} + +void platform_notify(uint32_t vector_id) +{ + /* As Linux suggests, use MU->Data Channel 1 as communication channel */ + uint32_t msg = (uint32_t)(vector_id << 16); + + env_lock_mutex(platform_lock); + MU_SendMsg(APP_M4_MU, RPMSG_MU_CHANNEL, msg); + env_unlock_mutex(platform_lock); +} + +/* + * MU Interrrupt RPMsg handler + */ +int32_t LSIO_MU5_INT_B_IRQHandler(void) +{ + uint32_t channel; + + if ((((1UL << 27U) >> RPMSG_MU_CHANNEL) & MU_GetStatusFlags(APP_M4_MU)) != 0UL) + { + channel = MU_ReceiveMsgNonBlocking(APP_M4_MU, RPMSG_MU_CHANNEL); // Read message from RX register. + env_isr((uint32_t)(channel >> 16)); + } + + return 0; +} + +/** + * platform_time_delay + * + * @param num_msec Delay time in ms. + * + * This is not an accurate delay, it ensures at least num_msec passed when return. + */ +void platform_time_delay(uint32_t num_msec) +{ + uint32_t loop; + + /* Recalculate the CPU frequency */ + SystemCoreClockUpdate(); + + /* Calculate the CPU loops to delay, each loop has 3 cycles */ + loop = SystemCoreClock / 3U / 1000U * num_msec; + + /* There's some difference among toolchains, 3 or 4 cycles each loop */ + while (loop > 0U) + { + __NOP(); + loop--; + } +} + +/** + * platform_in_isr + * + * Return whether CPU is processing IRQ + * + * @return True for IRQ, false otherwise. + * + */ +int32_t platform_in_isr(void) +{ + return (((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) != 0UL) ? 1 : 0); +} + +/** + * platform_interrupt_enable + * + * Enable peripheral-related interrupt + * + * @param vector_id Virtual vector ID that needs to be converted to IRQ number + * + * @return vector_id Return value is never checked. + * + */ +int32_t platform_interrupt_enable(uint32_t vector_id) +{ + RL_ASSERT(0 < disable_counter); + + platform_global_isr_disable(); + disable_counter--; + + if (disable_counter == 0) + { + NVIC_EnableIRQ(APP_M4_MU_NVIC_IRQn); + } + platform_global_isr_enable(); + return ((int32_t)vector_id); +} + +/** + * platform_interrupt_disable + * + * Disable peripheral-related interrupt. + * + * @param vector_id Virtual vector ID that needs to be converted to IRQ number + * + * @return vector_id Return value is never checked. + * + */ +int32_t platform_interrupt_disable(uint32_t vector_id) +{ + RL_ASSERT(0 <= disable_counter); + + platform_global_isr_disable(); + /* virtqueues use the same NVIC vector + if counter is set - the interrupts are disabled */ + if (disable_counter == 0) + { + NVIC_DisableIRQ(APP_M4_MU_NVIC_IRQn); + } + disable_counter++; + platform_global_isr_enable(); + return ((int32_t)vector_id); +} + +/** + * platform_map_mem_region + * + * Dummy implementation + * + */ +void platform_map_mem_region(uint32_t vrt_addr, uint32_t phy_addr, uint32_t size, uint32_t flags) +{ +} + +/** + * platform_cache_all_flush_invalidate + * + * Dummy implementation + * + */ +void platform_cache_all_flush_invalidate(void) +{ +} + +/** + * platform_cache_disable + * + * Dummy implementation + * + */ +void platform_cache_disable(void) +{ +} + +/** + * platform_vatopa + * + * Dummy implementation + * + */ +uint32_t platform_vatopa(void *addr) +{ + return ((uint32_t)(char *)addr); +} + +/** + * platform_patova + * + * Dummy implementation + * + */ +void *platform_patova(uint32_t addr) +{ + return ((void *)(char *)addr); +} + +/** + * platform_init + * + * platform/environment init + */ +int32_t platform_init(void) +{ + /* + * Prepare for the MU Interrupt + * MU must be initialized before rpmsg init is called + */ + MU_Init(APP_M4_MU); + NVIC_SetPriority(APP_M4_MU_NVIC_IRQn, APP_MU_IRQ_PRIORITY); + IRQSTEER_EnableInterrupt(IRQSTEER, APP_M4_MU_IRQn); + + /* Create lock used in multi-instanced RPMsg */ + if (0 != env_create_mutex(&platform_lock, 1)) + { + return -1; + } + + return 0; +} + +/** + * platform_deinit + * + * platform/environment deinit process + */ +int32_t platform_deinit(void) +{ + MU_Deinit(APP_M4_MU); + IRQSTEER_DisableInterrupt(IRQSTEER, APP_M4_MU_IRQn); + + /* Delete lock used in multi-instanced RPMsg */ + env_delete_mutex(platform_lock); + platform_lock = ((void *)0); + return 0; +} diff --git a/lib/rpmsg_lite/porting/platform/imxrt600_hifi4/rpmsg_platform.c b/lib/rpmsg_lite/porting/platform/imxrt600_hifi4/rpmsg_platform.c new file mode 100644 index 0000000..7db196e --- /dev/null +++ b/lib/rpmsg_lite/porting/platform/imxrt600_hifi4/rpmsg_platform.c @@ -0,0 +1,382 @@ +/* + * Copyright 2019 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#include +#include +#include + +#include "rpmsg_platform.h" +#include "rpmsg_env.h" +#include +#include +#include "fsl_device_registers.h" +#include "fsl_mu.h" + +#if defined(RL_USE_MCMGR_IPC_ISR_HANDLER) && (RL_USE_MCMGR_IPC_ISR_HANDLER == 1) +//@Lei +//#include "mcmgr.h" +#endif + +static int32_t isr_counter = 0; +static int32_t disable_counter = 0; +static void *platform_lock; + +#if defined(RL_USE_MCMGR_IPC_ISR_HANDLER) && (RL_USE_MCMGR_IPC_ISR_HANDLER == 1) +static void mcmgr_event_handler(uint16_t vring_idx, void *context) +{ + env_isr((uint32_t)vring_idx); +} +#else +void MU_B_IRQHandler(void *arg) +{ + uint32_t channel; + + if ((((1UL << 27U) >> RPMSG_MU_CHANNEL) & MUB->SR) != 0UL) + { + channel = MUB->RR[RPMSG_MU_CHANNEL]; /* Read message from RX register. */ + env_isr(RL_GET_VQ_ID(RPMSG_LITE_LINK_ID, RL_GET_Q_ID(channel >> 16))); + } + +/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping + exception return operation might vector to incorrect interrupt */ +#if defined __CORTEX_M && (__CORTEX_M == 4U) + __DSB(); +#endif +} +#endif + +int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data) +{ + /* Register ISR to environment layer */ + env_register_isr(vector_id, isr_data); + + env_lock_mutex(platform_lock); + + RL_ASSERT(0 <= isr_counter); + + if (isr_counter == 0) + { + /* @Yuan Enable MUB receive interrupt. */ + uint32_t reg = MUB->CR & ~(0xf0008); + MUB->CR = reg | ((1UL << 27U) >> RPMSG_MU_CHANNEL); + +#if defined(__CM4_CMSIS_VERSION) + NVIC_SetPriority(MAILBOX_IRQn, 5); +#elif defined(__XCC__) + + /* + * @Lei Register interrupt based on vq_id. It has to be hashed as + * 0 is NMI + * 1 is SW + * 2 & 3 is Timer, Timer.0 & Timer.1 + * 4 is profiling + * 5~15 level 1 interrupts + * 16~23 level 2 interrupts + * 24~31 level 3 interrupts + * Note that different priority interrupts are not nesting in one stack + */ + //_xtos_set_interrupt_handler(6, MU_B_IRQHandler); + xos_register_interrupt_handler(6, MU_B_IRQHandler, ((void *)0)); + +#else + NVIC_SetPriority(MAILBOX_IRQn, 2); +#endif + } + isr_counter++; + + env_unlock_mutex(platform_lock); + + return 0; +} + +int32_t platform_deinit_interrupt(uint32_t vector_id) +{ + /* Prepare the MU Hardware */ + env_lock_mutex(platform_lock); + + RL_ASSERT(0 < isr_counter); + isr_counter--; + if (isr_counter == 0) + { + /* @Yuan Disable MUB receive interrupt. */ + uint32_t reg = MUB->CR & ~(0xf0008 | ((1UL << 27U) >> RPMSG_MU_CHANNEL)); + MUB->CR = reg; +#if defined(__XCC__) + /* + * @Lei Set handler to 0 to cease the interrupt. + */ + // _xtos_set_interrupt_handler(6, ((void *)0)); + xos_register_interrupt_handler(6, ((void *)0), ((void *)0)); +#else + NVIC_DisableIRQ(MAILBOX_IRQn); +#endif + } + + /* Unregister ISR from environment layer */ + env_unregister_isr(vector_id); + + env_unlock_mutex(platform_lock); + + return 0; +} + +void platform_notify(uint32_t vector_id) +{ + uint32_t msg = (uint32_t)(vector_id << 16); +//#if defined (__XCC__) +/* + * @Lei MCMGR not supported at this moment. + */ +#if defined(RL_USE_MCMGR_IPC_ISR_HANDLER) && (RL_USE_MCMGR_IPC_ISR_HANDLER == 1) + env_lock_mutex(platform_lock); + MCMGR_TriggerEvent(kMCMGR_RemoteRPMsgEvent, (uint16_t)RL_GET_Q_ID(vector_id)); + env_unlock_mutex(platform_lock); +#else + switch (RL_GET_LINK_ID(vector_id)) + { + case RPMSG_LITE_LINK_ID: + env_lock_mutex(platform_lock); + while (!(MUB->SR & ((1U << 23) >> RPMSG_MU_CHANNEL))) + { + } + + MUB->TR[RPMSG_MU_CHANNEL] = msg; + env_unlock_mutex(platform_lock); + return; + default: + return; + } +#endif +} + +/** + * platform_time_delay + * + * @param num_msec Delay time in ms. + * + * This is not an accurate delay, it ensures at least num_msec passed when return. + */ +void platform_time_delay(uint32_t num_msec) +{ +/* + * @Lei Cycle accurate time delay. + */ +#if defined(__XCC__) +// 8MHz main clock on FPGA +#define SystemCoreClock 8000000 + + uint32_t loop, ccount; + + /* Get current cycle count */ + ccount = xthal_get_ccount(); + /* Calculate cycles to be delayed */ + loop = SystemCoreClock / 1000U * num_msec; + + do + { + loop -= xthal_get_ccount() - ccount; + } while (loop > 0); +#endif +} + +/** + * platform_in_isr + * + * Return whether CPU is processing IRQ + * + * @return True for IRQ, false otherwise. + * + */ +int32_t platform_in_isr(void) +{ +/* + * @Lei HIFI doesn't have direct API or a register file to indicate the core in IRQ. TBD. + * Always return false. + */ +#if defined(__XCC__) + return 0; +#elif + return (((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) != 0UL) ? 1 : 0); +#endif +} + +/** + * platform_interrupt_enable + * + * Enable peripheral-related interrupt + * + * @param vector_id Virtual vector ID that needs to be converted to IRQ number + * + * @return vector_id Return value is never checked. + * + */ +int32_t platform_interrupt_enable(uint32_t vector_id) +{ + RL_ASSERT(0 < disable_counter); + /* + * @Lei Enable the interrupt. Don't forget to hash the ID. + * @Yuan Select MUB interrupt as DSP IRQ6 source. + * + */ + +#if defined(__XCC__) + // _xtos_ints_on(1<<(6)); + xos_interrupt_enable(6); + disable_counter--; + return ((int32_t)vector_id); +#elif + __asm volatile("cpsid i"); + disable_counter--; + + if (disable_counter == 0) + NVIC_EnableIRQ(MAILBOX_IRQn); + __asm volatile("cpsie i"); + return ((int32_t)vector_id); +#endif +} + +/** + * platform_interrupt_disable + * + * Disable peripheral-related interrupt. + * + * @param vector_id Virtual vector ID that needs to be converted to IRQ number + * + * @return vector_id Return value is never checked. + * + */ +int32_t platform_interrupt_disable(uint32_t vector_id) +{ + RL_ASSERT(0 <= disable_counter); + + /* + * @Lei Disable the interrupt. Don't forget to hash the ID. + */ +#if defined(__XCC__) + // _xtos_ints_off(1<<(6)); + xos_interrupt_disable(6); + disable_counter++; + return ((int32_t)vector_id); +#elif + __asm volatile("cpsid i"); + // virtqueues use the same NVIC vector + // if counter is set - the interrupts are disabled + if (disable_counter == 0) + NVIC_DisableIRQ(MAILBOX_IRQn); + + disable_counter++; + __asm volatile("cpsie i"); + return ((int32_t)vector_id); +#endif +} + +/** + * platform_map_mem_region + * + * Dummy implementation + * + */ +void platform_map_mem_region(uint32_t vrt_addr, uint32_t phy_addr, uint32_t size, uint32_t flags) +{ +} + +/** + * platform_cache_all_flush_invalidate + * + * Dummy implementation + * + */ +void platform_cache_all_flush_invalidate(void) +{ +} + +/** + * platform_cache_disable + * + * Dummy implementation + * + */ +void platform_cache_disable(void) +{ +} + +/** + * platform_vatopa + * + * Dummy implementation + * + */ +uint32_t platform_vatopa(void *addr) +{ + return ((uint32_t)(char *)addr); +} + +/** + * platform_patova + * + * Dummy implementation + * + */ +void *platform_patova(uint32_t addr) +{ + return ((void *)(char *)addr); +} + +/** + * platform_init + * + * platform/environment init + */ +int32_t platform_init(void) +{ +#if defined(__XCC__) +/* + * @Lei MCMGR not supported at this moment. + */ +#elif defined(RL_USE_MCMGR_IPC_ISR_HANDLER) && (RL_USE_MCMGR_IPC_ISR_HANDLER == 1) + MCMGR_RegisterEvent(kMCMGR_RemoteRPMsgEvent, mcmgr_event_handler, ((void *)0)); +#else + MAILBOX_Init(MAILBOX); +#endif + + /* Create lock used in multi-instanced RPMsg */ + if (0 != env_create_mutex(&platform_lock, 1)) + { + return -1; + } + + return 0; +} + +/** + * platform_deinit + * + * platform/environment deinit process + */ +int32_t platform_deinit(void) +{ +#if defined(__XCC__) +/* + * @Lei MCMGR not supported at this moment. + */ +/* Import from LPC5411x and keep it here - do not deinit mailbox, if there + is a pending ISR on the other core! */ +#elif defined(__CM4_CMSIS_VERSION) + while (0 != MAILBOX_GetValue(MAILBOX, kMAILBOX_CM0Plus)) + ; +#else + while (0 != MAILBOX_GetValue(MAILBOX, kMAILBOX_CM4)) + ; +#endif + + // MAILBOX_Deinit(MAILBOX); + + /* Delete lock used in multi-instanced RPMsg */ + env_delete_mutex(platform_lock); + platform_lock = ((void *)0); + return 0; +} diff --git a/lib/rpmsg_lite/porting/platform/imxrt600_m33/rpmsg_platform.c b/lib/rpmsg_lite/porting/platform/imxrt600_m33/rpmsg_platform.c new file mode 100644 index 0000000..3277d93 --- /dev/null +++ b/lib/rpmsg_lite/porting/platform/imxrt600_m33/rpmsg_platform.c @@ -0,0 +1,313 @@ +/* + * Copyright 2019 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#include +#include + +#include "rpmsg_platform.h" +#include "rpmsg_env.h" + +#include "fsl_device_registers.h" +#include "fsl_mu.h" + +#if defined(RL_USE_MCMGR_IPC_ISR_HANDLER) && (RL_USE_MCMGR_IPC_ISR_HANDLER == 1) +#include "mcmgr.h" +#endif + +#if defined(RL_USE_ENVIRONMENT_CONTEXT) && (RL_USE_ENVIRONMENT_CONTEXT == 1) +#error "This RPMsg-Lite port requires RL_USE_ENVIRONMENT_CONTEXT set to 0" +#endif + +#define APP_MU_IRQ_PRIORITY (3U) + +/* The MU instance used for CM33 and DSP core communication */ +#define APP_MU MUA +#define APP_MU_IRQn MU_A_IRQn + +static int32_t isr_counter = 0; +static int32_t disable_counter = 0; +static void *platform_lock; + +#if defined(RL_USE_MCMGR_IPC_ISR_HANDLER) && (RL_USE_MCMGR_IPC_ISR_HANDLER == 1) +static void mcmgr_event_handler(uint16_t vring_idx, void *context) +{ + env_isr((uint32_t)vring_idx); +} +#else +void MU_A_IRQHandler(void) +{ + uint32_t channel; + + if ((((1UL << 27U) >> RPMSG_MU_CHANNEL) & MU_GetStatusFlags(APP_MU)) != 0UL) + { + channel = MU_ReceiveMsgNonBlocking(APP_MU, RPMSG_MU_CHANNEL); /* Read message from RX register. */ + env_isr(RL_GET_VQ_ID(RL_PLATFORM_LPC6324_M33_DSP_LINK_ID, RL_GET_Q_ID(channel >> 16))); + } + +/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping + exception return operation might vector to incorrect interrupt */ +#if defined __CORTEX_M && (__CORTEX_M == 4U) + __DSB(); +#endif +} +#endif + +static void platform_global_isr_disable(void) +{ + __asm volatile("cpsid i"); +} + +static void platform_global_isr_enable(void) +{ + __asm volatile("cpsie i"); +} + +int32_t platform_init_interrupt(uint32_t vector_id, void *isr_data) +{ + /* Register ISR to environment layer */ + env_register_isr(vector_id, isr_data); + + env_lock_mutex(platform_lock); + + RL_ASSERT(0 <= isr_counter); + if (isr_counter == 0) + { + MU_EnableInterrupts(APP_MU, (1UL << 27U) >> RPMSG_MU_CHANNEL); + } + isr_counter++; + + env_unlock_mutex(platform_lock); + + return 0; +} + +int32_t platform_deinit_interrupt(uint32_t vector_id) +{ + /* Prepare the MU Hardware */ + env_lock_mutex(platform_lock); + + RL_ASSERT(0 < isr_counter); + isr_counter--; + if (isr_counter == 0) + { + MU_DisableInterrupts(APP_MU, (1UL << 27U) >> RPMSG_MU_CHANNEL); + } + + /* Unregister ISR from environment layer */ + env_unregister_isr(vector_id); + + env_unlock_mutex(platform_lock); + + return 0; +} + +void platform_notify(uint32_t vector_id) +{ + uint32_t msg = (uint32_t)(vector_id << 16); + +#if defined(RL_USE_MCMGR_IPC_ISR_HANDLER) && (RL_USE_MCMGR_IPC_ISR_HANDLER == 1) + env_lock_mutex(platform_lock); + MCMGR_TriggerEvent(kMCMGR_RemoteRPMsgEvent, RL_GET_Q_ID(vector_id)); + env_unlock_mutex(platform_lock); +#else + switch (RL_GET_LINK_ID(vector_id)) + { + case 0: + env_lock_mutex(platform_lock); + MU_SendMsg(APP_MU, RPMSG_MU_CHANNEL, msg); + env_unlock_mutex(platform_lock); + return; + default: + return; + } +#endif +} + +/** + * platform_time_delay + * + * @param num_msec Delay time in ms. + * + * This is not an accurate delay, it ensures at least num_msec passed when return. + */ +void platform_time_delay(uint32_t num_msec) +{ + uint32_t loop; + + /* Recalculate the CPU frequency */ + SystemCoreClockUpdate(); + + /* Calculate the CPU loops to delay, each loop has 3 cycles */ + loop = SystemCoreClock / 3U / 1000U * num_msec; + + /* There's some difference among toolchains, 3 or 4 cycles each loop */ + while (loop > 0U) + { + __NOP(); + loop--; + } +} + +/** + * platform_in_isr + * + * Return whether CPU is processing IRQ + * + * @return True for IRQ, false otherwise. + * + */ +int32_t platform_in_isr(void) +{ + return (((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) != 0UL) ? 1 : 0); +} + +/** + * platform_interrupt_enable + * + * Enable peripheral-related interrupt + * + * @param vector_id Virtual vector ID that needs to be converted to IRQ number + * + * @return vector_id Return value is never checked. + * + */ +int32_t platform_interrupt_enable(uint32_t vector_id) +{ + RL_ASSERT(0 < disable_counter); + + platform_global_isr_disable(); + disable_counter--; + + if (disable_counter == 0) + { + NVIC_EnableIRQ(APP_MU_IRQn); + } + platform_global_isr_enable(); + return ((int32_t)vector_id); +} + +/** + * platform_interrupt_disable + * + * Disable peripheral-related interrupt. + * + * @param vector_id Virtual vector ID that needs to be converted to IRQ number + * + * @return vector_id Return value is never checked. + * + */ +int32_t platform_interrupt_disable(uint32_t vector_id) +{ + RL_ASSERT(0 <= disable_counter); + + platform_global_isr_disable(); + /* virtqueues use the same NVIC vector + if counter is set - the interrupts are disabled */ + if (disable_counter == 0) + { + NVIC_DisableIRQ(APP_MU_IRQn); + } + disable_counter++; + platform_global_isr_enable(); + return ((int32_t)vector_id); +} + +/** + * platform_map_mem_region + * + * Dummy implementation + * + */ +void platform_map_mem_region(uint32_t vrt_addr, uint32_t phy_addr, uint32_t size, uint32_t flags) +{ +} + +/** + * platform_cache_all_flush_invalidate + * + * Dummy implementation + * + */ +void platform_cache_all_flush_invalidate(void) +{ +} + +/** + * platform_cache_disable + * + * Dummy implementation + * + */ +void platform_cache_disable(void) +{ +} + +/** + * platform_vatopa + * + * Dummy implementation + * + */ +uint32_t platform_vatopa(void *addr) +{ + return ((uint32_t)(char *)addr); +} + +/** + * platform_patova + * + * Dummy implementation + * + */ +void *platform_patova(uint32_t addr) +{ + return ((void *)(char *)addr); +} + +/** + * platform_init + * + * platform/environment init + */ +int32_t platform_init(void) +{ +#if defined(RL_USE_MCMGR_IPC_ISR_HANDLER) && (RL_USE_MCMGR_IPC_ISR_HANDLER == 1) + mcmgr_status_t retval = kStatus_MCMGR_Error; + retval = MCMGR_RegisterEvent(kMCMGR_RemoteRPMsgEvent, mcmgr_event_handler, ((void *)0)); + if (kStatus_MCMGR_Success != retval) + { + return -1; + } +#else + MU_Init(APP_MU); + NVIC_SetPriority(APP_MU_IRQn, APP_MU_IRQ_PRIORITY); + NVIC_EnableIRQ(APP_MU_IRQn); +#endif + + /* Create lock used in multi-instanced RPMsg */ + if (0 != env_create_mutex(&platform_lock, 1)) + { + return -1; + } + + return 0; +} + +/** + * platform_deinit + * + * platform/environment deinit process + */ +int32_t platform_deinit(void) +{ + MU_Deinit(APP_MU); + + /* Delete lock used in multi-instanced RPMsg */ + env_delete_mutex(platform_lock); + platform_lock = ((void *)0); + return 0; +} diff --git a/lib/rpmsg_lite/rpmsg_lite.c b/lib/rpmsg_lite/rpmsg_lite.c index d042970..afe2af0 100644 --- a/lib/rpmsg_lite/rpmsg_lite.c +++ b/lib/rpmsg_lite/rpmsg_lite.c @@ -2,7 +2,7 @@ * Copyright (c) 2014, Mentor Graphics Corporation * Copyright (c) 2015 Xilinx, Inc. * Copyright (c) 2016 Freescale Semiconductor, Inc. - * Copyright 2016-2019 NXP + * Copyright 2016-2020 NXP * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -153,11 +153,14 @@ static void rpmsg_lite_rx_callback(struct virtqueue *vq) struct rpmsg_lite_endpoint *ept; int32_t cb_ret; struct llist *node; - struct rpmsg_hdr_reserved *rsvd; struct rpmsg_lite_instance *rpmsg_lite_dev = (struct rpmsg_lite_instance *)vq->priv; RL_ASSERT(rpmsg_lite_dev != RL_NULL); +#if defined(RL_USE_ENVIRONMENT_CONTEXT) && (RL_USE_ENVIRONMENT_CONTEXT == 1) + env_lock_mutex(rpmsg_lite_dev->lock); +#endif + /* Process the received data from remote node */ rpmsg_msg = (struct rpmsg_std_msg *)rpmsg_lite_dev->vq_ops->vq_rx(rpmsg_lite_dev->rvq, &len, &idx); @@ -174,8 +177,7 @@ static void rpmsg_lite_rx_callback(struct virtqueue *vq) if (cb_ret == RL_HOLD) { - rsvd = (struct rpmsg_hdr_reserved *)&rpmsg_msg->hdr.reserved; - rsvd->idx = idx; + rpmsg_msg->hdr.reserved.idx = idx; } else { @@ -183,6 +185,10 @@ static void rpmsg_lite_rx_callback(struct virtqueue *vq) } rpmsg_msg = (struct rpmsg_std_msg *)rpmsg_lite_dev->vq_ops->vq_rx(rpmsg_lite_dev->rvq, &len, &idx); } + +#if defined(RL_USE_ENVIRONMENT_CONTEXT) && (RL_USE_ENVIRONMENT_CONTEXT == 1) + env_unlock_mutex(rpmsg_lite_dev->lock); +#endif } /*! @@ -198,7 +204,7 @@ static void rpmsg_lite_tx_callback(struct virtqueue *vq) struct rpmsg_lite_instance *rpmsg_lite_dev = (struct rpmsg_lite_instance *)vq->priv; RL_ASSERT(rpmsg_lite_dev != RL_NULL); - rpmsg_lite_dev->link_state = 1; + rpmsg_lite_dev->link_state = 1U; } /**************************************************************************** @@ -681,7 +687,6 @@ int32_t rpmsg_lite_send(struct rpmsg_lite_instance *rpmsg_lite_dev, void *rpmsg_lite_alloc_tx_buffer(struct rpmsg_lite_instance *rpmsg_lite_dev, uint32_t *size, uint32_t timeout) { struct rpmsg_std_msg *rpmsg_msg; - struct rpmsg_hdr_reserved *reserved = RL_NULL; void *buffer; uint16_t idx; uint32_t tick_count = 0U; @@ -726,8 +731,7 @@ void *rpmsg_lite_alloc_tx_buffer(struct rpmsg_lite_instance *rpmsg_lite_dev, uin rpmsg_msg = (struct rpmsg_std_msg *)buffer; /* keep idx and totlen information for nocopy tx function */ - reserved = (struct rpmsg_hdr_reserved *)&rpmsg_msg->hdr.reserved; - reserved->idx = idx; + rpmsg_msg->hdr.reserved.idx = idx; /* return the maximum payload size */ *size -= sizeof(struct rpmsg_std_hdr); @@ -743,7 +747,6 @@ int32_t rpmsg_lite_send_nocopy(struct rpmsg_lite_instance *rpmsg_lite_dev, { struct rpmsg_std_msg *rpmsg_msg; uint32_t src; - struct rpmsg_hdr_reserved *reserved = RL_NULL; if ((ept == RL_NULL) || (data == RL_NULL)) { @@ -782,13 +785,12 @@ int32_t rpmsg_lite_send_nocopy(struct rpmsg_lite_instance *rpmsg_lite_dev, rpmsg_msg->hdr.len = (uint16_t)size; rpmsg_msg->hdr.flags = (uint16_t)RL_NO_FLAGS; - reserved = (struct rpmsg_hdr_reserved *)&rpmsg_msg->hdr.reserved; - env_lock_mutex(rpmsg_lite_dev->lock); /* Enqueue buffer on virtqueue. */ - rpmsg_lite_dev->vq_ops->vq_tx(rpmsg_lite_dev->tvq, (void *)rpmsg_msg, - (uint32_t)virtqueue_get_buffer_length(rpmsg_lite_dev->tvq, reserved->idx), - reserved->idx); + rpmsg_lite_dev->vq_ops->vq_tx( + rpmsg_lite_dev->tvq, (void *)rpmsg_msg, + (uint32_t)virtqueue_get_buffer_length(rpmsg_lite_dev->tvq, rpmsg_msg->hdr.reserved.idx), + rpmsg_msg->hdr.reserved.idx); /* Let the other side know that there is a job to process. */ virtqueue_kick(rpmsg_lite_dev->tvq); env_unlock_mutex(rpmsg_lite_dev->lock); @@ -809,7 +811,6 @@ int32_t rpmsg_lite_send_nocopy(struct rpmsg_lite_instance *rpmsg_lite_dev, int32_t rpmsg_lite_release_rx_buffer(struct rpmsg_lite_instance *rpmsg_lite_dev, void *rxbuf) { struct rpmsg_std_msg *rpmsg_msg; - struct rpmsg_hdr_reserved *reserved = RL_NULL; if (rpmsg_lite_dev == RL_NULL) { @@ -834,15 +835,13 @@ int32_t rpmsg_lite_release_rx_buffer(struct rpmsg_lite_instance *rpmsg_lite_dev, rpmsg_msg = RPMSG_STD_MSG_FROM_BUF(rxbuf); - /* Get the pointer to the reserved field that contains buffer size and the index */ - reserved = (struct rpmsg_hdr_reserved *)&rpmsg_msg->hdr.reserved; - env_lock_mutex(rpmsg_lite_dev->lock); /* Return used buffer, with total length (header length + buffer size). */ - rpmsg_lite_dev->vq_ops->vq_rx_free(rpmsg_lite_dev->rvq, rpmsg_msg, - (uint32_t)virtqueue_get_buffer_length(rpmsg_lite_dev->rvq, reserved->idx), - reserved->idx); + rpmsg_lite_dev->vq_ops->vq_rx_free( + rpmsg_lite_dev->rvq, rpmsg_msg, + (uint32_t)virtqueue_get_buffer_length(rpmsg_lite_dev->rvq, rpmsg_msg->hdr.reserved.idx), + rpmsg_msg->hdr.reserved.idx); env_unlock_mutex(rpmsg_lite_dev->lock); @@ -1047,7 +1046,7 @@ struct rpmsg_lite_instance *rpmsg_lite_master_init(void *shmem_addr, env_init_interrupt(rpmsg_lite_dev->env, rpmsg_lite_dev->tvq->vq_queue_index, rpmsg_lite_dev->tvq); env_disable_interrupt(rpmsg_lite_dev->env, rpmsg_lite_dev->rvq->vq_queue_index); env_disable_interrupt(rpmsg_lite_dev->env, rpmsg_lite_dev->tvq->vq_queue_index); - rpmsg_lite_dev->link_state = 1; + rpmsg_lite_dev->link_state = 1U; env_enable_interrupt(rpmsg_lite_dev->env, rpmsg_lite_dev->rvq->vq_queue_index); env_enable_interrupt(rpmsg_lite_dev->env, rpmsg_lite_dev->tvq->vq_queue_index); #else @@ -1055,7 +1054,7 @@ struct rpmsg_lite_instance *rpmsg_lite_master_init(void *shmem_addr, (void)platform_init_interrupt(rpmsg_lite_dev->tvq->vq_queue_index, rpmsg_lite_dev->tvq); env_disable_interrupt(rpmsg_lite_dev->rvq->vq_queue_index); env_disable_interrupt(rpmsg_lite_dev->tvq->vq_queue_index); - rpmsg_lite_dev->link_state = 1; + rpmsg_lite_dev->link_state = 1U; env_enable_interrupt(rpmsg_lite_dev->rvq->vq_queue_index); env_enable_interrupt(rpmsg_lite_dev->tvq->vq_queue_index); #endif diff --git a/lib/rpmsg_lite/rpmsg_ns.c b/lib/rpmsg_lite/rpmsg_ns.c index 70b38df..143919a 100644 --- a/lib/rpmsg_lite/rpmsg_ns.c +++ b/lib/rpmsg_lite/rpmsg_ns.c @@ -165,7 +165,7 @@ int32_t rpmsg_ns_unbind(struct rpmsg_lite_instance *rpmsg_lite_dev, rpmsg_ns_han int32_t rpmsg_ns_announce(struct rpmsg_lite_instance *rpmsg_lite_dev, struct rpmsg_lite_endpoint *new_ept, - char *ept_name, + const char *ept_name, uint32_t flags) { struct rpmsg_ns_msg ns_msg;