iio: adc: ad9361: Validate MAX Half Band filter rates

The Half Band decimation and interpolation filters do have some max rate they can run on. Typically the driver itself or AD9361 filter wizard takes these into account. However recently we discovered a corner case where max TX_HB1 rate of 160MSPS could have been exceed by using a interpolate by 4 FIR filter and a Baseband rate of > 40 MSPS. This patch adds a check for all max ratings of BBPPL, ADC, DAC, HB3, HB2 and HB1 filters in the system. Signed-off-by: Michael Hennerich <[email protected]>
analogdevicesinc · Apr 24, 2018 · 715ce15 · 715ce15
1 parent 1bd4cde
commit 715ce15
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/drivers/iio/adc/ad9361.c b/drivers/iio/adc/ad9361.c
@@ -3904,9 +3904,9 @@ static int ad9361_validate_trx_clock_chain(struct ad9361_rf_phy *phy,
 					   unsigned long *rx_path_clks,
 					   unsigned long *tx_path_clks)
 {
-	static const unsigned long max_rx_rates[] = {MAX_BBPLL_FREQ, MAX_ADC_CLK,
+	const unsigned long max_rx_rates[] = {MAX_BBPLL_FREQ, MAX_ADC_CLK,
 		MAX_RX_HB3, MAX_RX_HB2, MAX_RX_HB1, MAX_BASEBAND_RATE};
-	static const unsigned long max_tx_rates[] = {MAX_BBPLL_FREQ, MAX_DAC_CLK,
+	const unsigned long max_tx_rates[] = {MAX_BBPLL_FREQ, MAX_DAC_CLK,
 		MAX_TX_HB3, MAX_TX_HB2, MAX_TX_HB1, MAX_BASEBAND_RATE};
 	int i, data_clk;