Skip to content

Commit

Permalink
iio: adc: ad9361: move RX/TX port selection on state struct
Browse files Browse the repository at this point in the history 
The TX/RX port selection can be controlled via sysfs, so it makes sense to
make it a member of the state struct [vs the platform data struct].

Added accessor functions to update the selections, and to validate the
input.
The accessor functions will be used later in the band control.

Signed-off-by: Alexandru Ardelean <[email protected]>
  • Loading branch information
@commodo
commodo committed May 7, 2018
1 parent d11eea6 commit 48167d4
Show file tree
Hide file tree
Showing 3 changed files with 89 additions and 17 deletions.
80 changes: 65 additions & 15 deletions drivers/iio/adc/ad9361.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3085,6 +3085,58 @@ static int ad9361_rf_port_setup(struct ad9361_rf_phy *phy, bool is_out,
return ad9361_spi_write(phy->spi, REG_INPUT_SELECT, val);
}

int ad9361_set_rx_port(struct ad9361_rf_phy *phy, enum rx_port_sel sel)
{
struct ad9361_rf_phy_state *st;

if (!phy)
return -EINVAL;
switch (sel) {
case RX_A_BALANCED: /* FALLTHROUGH */
case RX_B_BALANCED: /* FALLTHROUGH */
case RX_C_BALANCED: /* FALLTHROUGH */
case RX_A_N: /* FALLTHROUGH */
case RX_A_P: /* FALLTHROUGH */
case RX_B_N: /* FALLTHROUGH */
case RX_B_P: /* FALLTHROUGH */
case RX_C_N: /* FALLTHROUGH */
case RX_C_P: /* FALLTHROUGH */
case TX_MON1: /* FALLTHROUGH */
case TX_MON2: /* FALLTHROUGH */
case TX_MON1_2:
st = phy->state;
if (st->rf_rx_input_sel == sel)
return 0;
st->rf_rx_input_sel = sel;
return ad9361_rf_port_setup(phy, false, sel,
st->rf_tx_output_sel);
default:
return -EINVAL;
}
}
EXPORT_SYMBOL(ad9361_set_rx_port);

int ad9361_set_tx_port(struct ad9361_rf_phy *phy, enum tx_port_sel sel)
{
struct ad9361_rf_phy_state *st;

if (!phy)
return -EINVAL;
switch (sel) {
case (TX_A): /* FALLTHROUGH */
case (TX_B):
st = phy->state;
if (st->rf_tx_output_sel == sel)
return 0;
st->rf_tx_output_sel = sel;
return ad9361_rf_port_setup(phy, true, st->rf_rx_input_sel,
sel);
default:
return -EINVAL;
}
}
EXPORT_SYMBOL(ad9361_set_tx_port);

/*
* Setup the Parallel Port (Digital Data Interface)
*/
Expand Down Expand Up @@ -4860,8 +4912,8 @@ static int ad9361_setup(struct ad9361_rf_phy *phy)
ad9361_en_dis_rx(phy, RX_1 | RX_2, RX_1 | RX_2);
}

ret = ad9361_rf_port_setup(phy, true, pd->rf_rx_input_sel,
pd->rf_tx_output_sel);
ret = ad9361_rf_port_setup(phy, true, st->rf_rx_input_sel,
st->rf_tx_output_sel);
if (ret < 0)
return ret;

Expand Down Expand Up @@ -7460,34 +7512,31 @@ static int ad9361_set_rf_port(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, u32 mode)
{
struct ad9361_rf_phy *phy = iio_priv(indio_dev);
struct ad9361_rf_phy_state *st = phy->state;

if (chan->output) {
if (phy->pdata->rf_tx_output_sel_lock &&
mode != phy->pdata->rf_tx_output_sel)
mode != st->rf_tx_output_sel)
return -EINVAL;
phy->pdata->rf_tx_output_sel = mode;
return ad9361_set_tx_port(phy, mode);
} else {
if (phy->pdata->rf_rx_input_sel_lock &&
mode != phy->pdata->rf_rx_input_sel)
mode != st->rf_rx_input_sel)
return -EINVAL;
phy->pdata->rf_rx_input_sel = mode;
return ad9361_set_rx_port(phy, mode);
}

return ad9361_rf_port_setup(phy, chan->output,
phy->pdata->rf_rx_input_sel,
phy->pdata->rf_tx_output_sel);

}

static int ad9361_get_rf_port(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct ad9361_rf_phy *phy = iio_priv(indio_dev);
struct ad9361_rf_phy_state *st = phy->state;

if (chan->output)
return phy->pdata->rf_tx_output_sel;
return st->rf_tx_output_sel;
else
return phy->pdata->rf_rx_input_sel;
return st->rf_rx_input_sel;
}

static const char * const ad9361_rf_rx_port[] =
Expand Down Expand Up @@ -8306,6 +8355,7 @@ static struct ad9361_phy_platform_data
{
struct device_node *np = dev->of_node;
struct ad9361_rf_phy *phy = iio_priv(iodev);
struct ad9361_rf_phy_state *st = phy->state;
struct ad9361_phy_platform_data *pdata;
u32 tx_path_clks[NUM_TX_CLOCKS];
u32 rx_path_clks[NUM_RX_CLOCKS];
Expand Down Expand Up @@ -8408,9 +8458,9 @@ static struct ad9361_phy_platform_data
&pdata->split_gt);

ad9361_of_get_u32(iodev, np, "adi,rx-rf-port-input-select", 0,
&pdata->rf_rx_input_sel);
&st->rf_rx_input_sel);
ad9361_of_get_u32(iodev, np, "adi,tx-rf-port-input-select", 0,
&pdata->rf_tx_output_sel);
&st->rf_tx_output_sel);

ad9361_of_get_bool(iodev, np, "adi,rx-rf-port-input-select-lock-enable",
&pdata->rf_rx_input_sel_lock);
Expand Down
22 changes: 22 additions & 0 deletions drivers/iio/adc/ad9361.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -71,6 +71,26 @@ enum {
ID_AD9363A,
};

enum rx_port_sel {
RX_A_BALANCED, /* 0 = (RX1A_N & RX1A_P) and (RX2A_N & RX2A_P) enabled; balanced */
RX_B_BALANCED, /* 1 = (RX1B_N & RX1B_P) and (RX2B_N & RX2B_P) enabled; balanced */
RX_C_BALANCED, /* 2 = (RX1C_N & RX1C_P) and (RX2C_N & RX2C_P) enabled; balanced */
RX_A_N, /* 3 = RX1A_N and RX2A_N enabled; unbalanced */
RX_A_P, /* 4 = RX1A_P and RX2A_P enabled; unbalanced */
RX_B_N, /* 5 = RX1B_N and RX2B_N enabled; unbalanced */
RX_B_P, /* 6 = RX1B_P and RX2B_P enabled; unbalanced */
RX_C_N, /* 7 = RX1C_N and RX2C_N enabled; unbalanced */
RX_C_P, /* 8 = RX1C_P and RX2C_P enabled; unbalanced */
TX_MON1, /* 9 = TX_MON1 enabled */
TX_MON2, /* 10 = TX_MON2 enabled */
TX_MON1_2, /* 11 = TX_MON1 & TX_MON2 enabled */
};

enum tx_port_sel {
TX_A,
TX_B,
};

enum digital_tune_skip_mode {
TUNE_RX_TX,
SKIP_TX,
Expand Down Expand Up @@ -158,6 +178,8 @@ int ad9361_get_dig_tune_data(struct ad9361_rf_phy *phy,
int ad9361_read_clock_data_delays(struct ad9361_rf_phy *phy);
int ad9361_write_clock_data_delays(struct ad9361_rf_phy *phy);
bool ad9361_uses_lvds_mode(struct ad9361_rf_phy *phy);
int ad9361_set_rx_port(struct ad9361_rf_phy *phy, enum rx_port_sel sel);
int ad9361_set_tx_port(struct ad9361_rf_phy *phy, enum tx_port_sel sel);

#endif

4 changes: 2 additions & 2 deletions drivers/iio/adc/ad9361_private.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -335,8 +335,6 @@ struct ad9361_phy_platform_data {
u8 dig_interface_tune_skipmode;
u32 dcxo_coarse;
u32 dcxo_fine;
u32 rf_rx_input_sel;
u32 rf_tx_output_sel;
bool rf_rx_input_sel_lock;
bool rf_tx_output_sel_lock;
u32 rx1tx1_mode_use_rx_num;
Expand Down Expand Up @@ -490,6 +488,8 @@ struct ad9361_rf_phy_state {
u32 tx2_atten_cached;
u8 bist_loopback_mode;
u8 bist_config;
u32 rf_rx_input_sel;
u32 rf_tx_output_sel;

struct ad9361_fastlock fastlock;
};
Expand Down

0 comments on commit 48167d4

Please sign in to comment.