Possible need of "volatile" with dsb/isb instructions

[ssilverman]

I was reading this: https://forum.pjrc.com/threads/69288-Strange-IRQ_CMP0-behaviour-of-Teensy-3-2-help-needed-to-track-down-issue?p=298177&viewfull=1#post298177
and remembered I've seen asm("dsb") instructions without the volatile.

The following places in this repo use this instruction without volatile:

1. cores/teensy4/usb_serial.c

   Line 343 in fdfd18f

   asm("dsb" ::: "memory");

2. cores/teensy4/usb_serial.c

   Line 388 in fdfd18f

   asm("dsb" ::: "memory");

3. cores/teensy4/startup.c

   Line 278 in 2e2dcf7

   asm("dsb");

   (there are two "dsb" and two "isb" here)

4. cores/teensy4/AudioStream.cpp

   Line 335 in a2368ad

   asm("DSB");

[FrankBoesing]

As these things work, there is no need to change them.

[FrankBoesing]

On the contrary - I'd think about removing the DSB  (for example for audiostream), after a test. 
A unneeded dsb is esp. with volatile a real performance killer.

"voaltile" by nature kills performance :)

[ssilverman]

Is there no chance of reordering, then, even with future compilers? Or maybe even the lines with :::“memory” can’t be reordered?

[FrankBoesing]

don't know.

[tsandmann]

There's no difference in using volatile here, because no output operands are used:

asm statements that have no output operands and asm goto statements, are implicitly volatile.

See gcc docs.

Reordering is a completely different story (that's independent of volatile).

[ssilverman]

Thanks, @tsandmann. That makes it a little more clear. Is there even a way to disable reordering for these statements?

Update: or maybe the compiler considers the “dsb” instruction non-reorderable?

[FrankBoesing]

There is no difference, yes, so it does not hurt to just leave it there :)

[FrankBoesing]

...and was it for GCC 5.4 the same?

[tsandmann]

Thanks, @tsandmann. That makes it a little more clear. Is there even a way to disable reordering for these statements?

Did you see any issue because of reordering there? I don't think there's an easy way to guarantee that, but if it's an actual issue here, sth. like the example in the linked docs should work.

Update: or maybe the compiler considers the “dsb” instruction non-reorderable?

I don't think so, but adding ::: "memory" prevents reordering any read/write instruction around it.

[tsandmann]

...and was it for GCC 5.4 the same?

According to gcc-5.4.0/gcc/Extended-Asm.html, yes.

[FrankBoesing]

thanks!

[ssilverman]

@tsandmann no issue with reordering that I know of. I thought that the comments in that forum post suggested that one must add volatile to prevent reordering. There’s some finer details which you pointed out. I’m just trying to learn more. Thanks for the info. :)